Hariprasad Shenai f01aa633e0 cxgb4: Fix PCI-E Memory window interface for big-endian systems ... When doing reads and writes to adapter memory via the PCI-E Memory Window interface, data gets swizzled on 4-byte boundaries on Big-Endian systems because we need to account for the register read/write interface which incorporates a swizzle onto the Little-Endian PCI-E Bus. Based on original work by Casey Leedom <leedom@chelsio.com> Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>		2015-02-27 15:53:43 -05:00
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cxgb	net: rename vlan_tx_* helpers since "tx" is misleading there	2015-01-13 17:51:08 -05:00
cxgb3	cxgb3: re-use native hex2bin()	2015-01-25 00:09:41 -08:00
cxgb4	cxgb4: Fix PCI-E Memory window interface for big-endian systems	2015-02-27 15:53:43 -05:00
cxgb4vf	Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net	2015-01-15 00:53:17 -05:00
Kconfig	cxgb4 : Fix build failure in cxgb4 when ipv6 is disabled/not in-built	2014-10-15 00:28:58 -04:00
Makefile