forked from Minki/linux
6fa4a94e15
Use the PCI mmconfig base address exported by jailhouse in boot parameters in order to access the memory mapped PCI configuration space. [Jan: rebased, fixed !CONFIG_PCI_MMCONFIG, used pcibios_last_bus] Signed-off-by: Otavio Pontes <otavio.pontes@intel.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Cc: jailhouse-dev@googlegroups.com Cc: linux-pci@vger.kernel.org Cc: virtualization@lists.linux-foundation.org Cc: Bjorn Helgaas <bhelgaas@google.com> Link: https://lkml.kernel.org/r/2ee9e4401fa22377b3965893a558120f169be82b.1520408357.git.jan.kiszka@siemens.com
220 lines
5.2 KiB
C
220 lines
5.2 KiB
C
// SPDX-License-Identifier: GPL2.0
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/*
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* Jailhouse paravirt_ops implementation
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*
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* Copyright (c) Siemens AG, 2015-2017
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*
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* Authors:
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* Jan Kiszka <jan.kiszka@siemens.com>
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*/
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#include <linux/acpi_pmtmr.h>
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#include <linux/kernel.h>
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#include <linux/reboot.h>
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#include <asm/apic.h>
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#include <asm/cpu.h>
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#include <asm/hypervisor.h>
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#include <asm/i8259.h>
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#include <asm/irqdomain.h>
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#include <asm/pci_x86.h>
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#include <asm/reboot.h>
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#include <asm/setup.h>
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static __initdata struct jailhouse_setup_data setup_data;
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static unsigned int precalibrated_tsc_khz;
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static uint32_t jailhouse_cpuid_base(void)
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{
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if (boot_cpu_data.cpuid_level < 0 ||
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!boot_cpu_has(X86_FEATURE_HYPERVISOR))
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return 0;
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return hypervisor_cpuid_base("Jailhouse\0\0\0", 0);
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}
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static uint32_t __init jailhouse_detect(void)
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{
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return jailhouse_cpuid_base();
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}
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static void jailhouse_get_wallclock(struct timespec *now)
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{
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memset(now, 0, sizeof(*now));
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}
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static void __init jailhouse_timer_init(void)
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{
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lapic_timer_frequency = setup_data.apic_khz * (1000 / HZ);
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}
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static unsigned long jailhouse_get_tsc(void)
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{
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return precalibrated_tsc_khz;
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}
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static void __init jailhouse_x2apic_init(void)
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{
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#ifdef CONFIG_X86_X2APIC
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if (!x2apic_enabled())
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return;
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/*
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* We do not have access to IR inside Jailhouse non-root cells. So
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* we have to run in physical mode.
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*/
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x2apic_phys = 1;
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/*
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* This will trigger the switch to apic_x2apic_phys. Empty OEM IDs
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* ensure that only this APIC driver picks up the call.
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*/
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default_acpi_madt_oem_check("", "");
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#endif
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}
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static void __init jailhouse_get_smp_config(unsigned int early)
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{
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struct ioapic_domain_cfg ioapic_cfg = {
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.type = IOAPIC_DOMAIN_STRICT,
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.ops = &mp_ioapic_irqdomain_ops,
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};
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struct mpc_intsrc mp_irq = {
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.type = MP_INTSRC,
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.irqtype = mp_INT,
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.irqflag = MP_IRQPOL_ACTIVE_HIGH | MP_IRQTRIG_EDGE,
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};
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unsigned int cpu;
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jailhouse_x2apic_init();
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register_lapic_address(0xfee00000);
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for (cpu = 0; cpu < setup_data.num_cpus; cpu++) {
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generic_processor_info(setup_data.cpu_ids[cpu],
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boot_cpu_apic_version);
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}
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smp_found_config = 1;
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if (setup_data.standard_ioapic) {
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mp_register_ioapic(0, 0xfec00000, gsi_top, &ioapic_cfg);
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/* Register 1:1 mapping for legacy UART IRQs 3 and 4 */
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mp_irq.srcbusirq = mp_irq.dstirq = 3;
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mp_save_irq(&mp_irq);
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mp_irq.srcbusirq = mp_irq.dstirq = 4;
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mp_save_irq(&mp_irq);
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}
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}
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static void jailhouse_no_restart(void)
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{
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pr_notice("Jailhouse: Restart not supported, halting\n");
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machine_halt();
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}
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static int __init jailhouse_pci_arch_init(void)
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{
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pci_direct_init(1);
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/*
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* There are no bridges on the virtual PCI root bus under Jailhouse,
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* thus no other way to discover all devices than a full scan.
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* Respect any overrides via the command line, though.
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*/
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if (pcibios_last_bus < 0)
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pcibios_last_bus = 0xff;
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#ifdef CONFIG_PCI_MMCONFIG
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if (setup_data.pci_mmconfig_base) {
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pci_mmconfig_add(0, 0, pcibios_last_bus,
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setup_data.pci_mmconfig_base);
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pci_mmcfg_arch_init();
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}
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#endif
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return 0;
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}
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static void __init jailhouse_init_platform(void)
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{
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u64 pa_data = boot_params.hdr.setup_data;
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struct setup_data header;
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void *mapping;
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x86_init.irqs.pre_vector_init = x86_init_noop;
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x86_init.timers.timer_init = jailhouse_timer_init;
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x86_init.mpparse.get_smp_config = jailhouse_get_smp_config;
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x86_init.pci.arch_init = jailhouse_pci_arch_init;
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x86_platform.calibrate_cpu = jailhouse_get_tsc;
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x86_platform.calibrate_tsc = jailhouse_get_tsc;
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x86_platform.get_wallclock = jailhouse_get_wallclock;
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x86_platform.legacy.rtc = 0;
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x86_platform.legacy.warm_reset = 0;
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x86_platform.legacy.i8042 = X86_LEGACY_I8042_PLATFORM_ABSENT;
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legacy_pic = &null_legacy_pic;
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machine_ops.emergency_restart = jailhouse_no_restart;
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while (pa_data) {
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mapping = early_memremap(pa_data, sizeof(header));
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memcpy(&header, mapping, sizeof(header));
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early_memunmap(mapping, sizeof(header));
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if (header.type == SETUP_JAILHOUSE &&
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header.len >= sizeof(setup_data)) {
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pa_data += offsetof(struct setup_data, data);
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mapping = early_memremap(pa_data, sizeof(setup_data));
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memcpy(&setup_data, mapping, sizeof(setup_data));
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early_memunmap(mapping, sizeof(setup_data));
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break;
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}
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pa_data = header.next;
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}
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if (!pa_data)
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panic("Jailhouse: No valid setup data found");
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if (setup_data.compatible_version > JAILHOUSE_SETUP_REQUIRED_VERSION)
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panic("Jailhouse: Unsupported setup data structure");
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pmtmr_ioport = setup_data.pm_timer_address;
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pr_debug("Jailhouse: PM-Timer IO Port: %#x\n", pmtmr_ioport);
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precalibrated_tsc_khz = setup_data.tsc_khz;
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setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ);
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pci_probe = 0;
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/*
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* Avoid that the kernel complains about missing ACPI tables - there
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* are none in a non-root cell.
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*/
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disable_acpi();
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}
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bool jailhouse_paravirt(void)
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{
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return jailhouse_cpuid_base() != 0;
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}
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static bool jailhouse_x2apic_available(void)
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{
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/*
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* The x2APIC is only available if the root cell enabled it. Jailhouse
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* does not support switching between xAPIC and x2APIC.
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*/
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return x2apic_enabled();
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}
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const struct hypervisor_x86 x86_hyper_jailhouse __refconst = {
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.name = "Jailhouse",
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.detect = jailhouse_detect,
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.init.init_platform = jailhouse_init_platform,
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.init.x2apic_available = jailhouse_x2apic_available,
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};
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