linux/drivers/clk/at91
Eugen Hristev 66d9f5214c clk: at91: sam9x60: fix programmable clock prescaler
The prescaler works as parent rate divided by (PRES + 1) (is_pres_direct == 1)
It does not work in the way of parent rate shifted to the right by (PRES + 1),
which means division by 2^(PRES + 1) (is_pres_direct == 0)
Thus is_pres_direct must be enabled for this SoC, to make the right computation.
This field was added in
commit 45b0668211 ("clk: at91: fix programmable clock for sama5d2")
SAM9X60 has the same field as SAMA5D2 in the PCK

Fixes: 01e2113de9 ("clk: at91: add sam9x60 pmc driver")
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Link: https://lkml.kernel.org/r/1575977088-16781-1-git-send-email-eugen.hristev@microchip.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-01-05 19:06:54 -08:00
..
at91sam9rl.c clk: at91: Mark struct clk_range as const 2019-04-25 14:16:26 -07:00
at91sam9x5.c clk: at91: Mark struct clk_range as const 2019-04-25 14:16:26 -07:00
at91sam9260.c clk: at91: Mark struct clk_range as const 2019-04-25 14:16:26 -07:00
clk-audio-pll.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152 2019-05-30 11:26:32 -07:00
clk-generated.c clk: at91: generated: Truncate divisor to GENERATED_MAX_DIV + 1 2019-07-22 14:32:08 -07:00
clk-h32mx.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152 2019-05-30 11:26:32 -07:00
clk-i2s-mux.c clk: at91: move DT compatibility code to its own file 2018-10-17 10:45:39 -07:00
clk-main.c clk: at91: avoid sleeping early 2019-10-28 07:55:01 -07:00
clk-master.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152 2019-05-30 11:26:32 -07:00
clk-peripheral.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152 2019-05-30 11:26:32 -07:00
clk-pll.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152 2019-05-30 11:26:32 -07:00
clk-plldiv.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152 2019-05-30 11:26:32 -07:00
clk-programmable.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152 2019-05-30 11:26:32 -07:00
clk-sam9x60-pll.c clk: at91: sam9x60-pll: adapt PMC_PLL_ACR default value 2020-01-05 19:06:31 -08:00
clk-slow.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152 2019-05-30 11:26:32 -07:00
clk-smd.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152 2019-05-30 11:26:32 -07:00
clk-system.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152 2019-05-30 11:26:32 -07:00
clk-usb.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152 2019-05-30 11:26:32 -07:00
clk-utmi.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152 2019-05-30 11:26:32 -07:00
dt-compat.c clk: at91: allow configuring generated PCR layout 2019-04-25 12:34:03 -07:00
Makefile clk: at91: add sam9x60 pmc driver 2019-04-25 14:15:53 -07:00
pmc.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152 2019-05-30 11:26:32 -07:00
pmc.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152 2019-05-30 11:26:32 -07:00
sam9x60.c clk: at91: sam9x60: fix programmable clock prescaler 2020-01-05 19:06:54 -08:00
sama5d2.c clk: at91: allow 24 Mhz clock as input for PLL 2019-09-17 22:00:31 -07:00
sama5d4.c clk: at91: Mark struct clk_range as const 2019-04-25 14:16:26 -07:00
sckc.c This merge window we have one small clk provider API in the core framework and 2019-12-01 16:06:02 -08:00