forked from Minki/linux
3b3f1650b1
With the possibility of addition of many more number of rings in future, the drm_i915_private structure could bloat as an array, of type intel_engine_cs, is embedded inside it. struct intel_engine_cs engine[I915_NUM_ENGINES]; Though this is still fine as generally there is only a single instance of drm_i915_private structure used, but not all of the possible rings would be enabled or active on most of the platforms. Some memory can be saved by allocating intel_engine_cs structure only for the enabled/active engines. Currently the engine/ring ID is kept static and dev_priv->engine[] is simply indexed using the enums defined in intel_engine_id. To save memory and continue using the static engine/ring IDs, 'engine' is defined as an array of pointers. struct intel_engine_cs *engine[I915_NUM_ENGINES]; dev_priv->engine[engine_ID] will be NULL for disabled engine instances. There is a text size reduction of 928 bytes, from 1028200 to 1027272, for i915.o file (but for i915.ko file text size remain same as 1193131 bytes). v2: - Remove the engine iterator field added in drm_i915_private structure, instead pass a local iterator variable to the for_each_engine** macros. (Chris) - Do away with intel_engine_initialized() and instead directly use the NULL pointer check on engine pointer. (Chris) v3: - Remove for_each_engine_id() macro, as the updated macro for_each_engine() can be used in place of it. (Chris) - Protect the access to Render engine Fault register with a NULL check, as engine specific init is done later in Driver load sequence. v4: - Use !!dev_priv->engine[VCS] style for the engine check in getparam. (Chris) - Kill the superfluous init_engine_lists(). v5: - Cleanup the intel_engines_init() & intel_engines_setup(), with respect to allocation of intel_engine_cs structure. (Chris) v6: - Rebase. v7: - Optimize the for_each_engine_masked() macro. (Chris) - Change the type of 'iter' local variable to enum intel_engine_id. (Chris) - Rebase. v8: Rebase. v9: Rebase. v10: - For index calculation use engine ID instead of pointer based arithmetic in intel_engine_sync_index() as engine pointers are not contiguous now (Chris) - For appropriateness, rename local enum variable 'iter' to 'id'. (Joonas) - Use for_each_engine macro for cleanup in intel_engines_init() and remove check for NULL engine pointer in cleanup() routines. (Joonas) v11: Rebase. Cc: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Akash Goel <akash.goel@intel.com> Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1476378888-7372-1-git-send-email-akash.goel@intel.com
654 lines
19 KiB
C
654 lines
19 KiB
C
/*
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* Copyright © 2015 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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*/
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#include <linux/kthread.h>
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#include "i915_drv.h"
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static void intel_breadcrumbs_hangcheck(unsigned long data)
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{
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struct intel_engine_cs *engine = (struct intel_engine_cs *)data;
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struct intel_breadcrumbs *b = &engine->breadcrumbs;
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if (!b->irq_enabled)
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return;
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if (time_before(jiffies, b->timeout)) {
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mod_timer(&b->hangcheck, b->timeout);
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return;
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}
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DRM_DEBUG("Hangcheck timer elapsed... %s idle\n", engine->name);
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set_bit(engine->id, &engine->i915->gpu_error.missed_irq_rings);
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mod_timer(&engine->breadcrumbs.fake_irq, jiffies + 1);
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/* Ensure that even if the GPU hangs, we get woken up.
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*
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* However, note that if no one is waiting, we never notice
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* a gpu hang. Eventually, we will have to wait for a resource
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* held by the GPU and so trigger a hangcheck. In the most
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* pathological case, this will be upon memory starvation! To
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* prevent this, we also queue the hangcheck from the retire
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* worker.
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*/
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i915_queue_hangcheck(engine->i915);
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}
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static unsigned long wait_timeout(void)
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{
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return round_jiffies_up(jiffies + DRM_I915_HANGCHECK_JIFFIES);
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}
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static void intel_breadcrumbs_fake_irq(unsigned long data)
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{
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struct intel_engine_cs *engine = (struct intel_engine_cs *)data;
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/*
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* The timer persists in case we cannot enable interrupts,
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* or if we have previously seen seqno/interrupt incoherency
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* ("missed interrupt" syndrome). Here the worker will wake up
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* every jiffie in order to kick the oldest waiter to do the
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* coherent seqno check.
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*/
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if (intel_engine_wakeup(engine))
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mod_timer(&engine->breadcrumbs.fake_irq, jiffies + 1);
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}
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static void irq_enable(struct intel_engine_cs *engine)
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{
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/* Enabling the IRQ may miss the generation of the interrupt, but
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* we still need to force the barrier before reading the seqno,
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* just in case.
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*/
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engine->breadcrumbs.irq_posted = true;
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spin_lock_irq(&engine->i915->irq_lock);
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engine->irq_enable(engine);
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spin_unlock_irq(&engine->i915->irq_lock);
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}
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static void irq_disable(struct intel_engine_cs *engine)
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{
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spin_lock_irq(&engine->i915->irq_lock);
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engine->irq_disable(engine);
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spin_unlock_irq(&engine->i915->irq_lock);
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engine->breadcrumbs.irq_posted = false;
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}
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static void __intel_breadcrumbs_enable_irq(struct intel_breadcrumbs *b)
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{
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struct intel_engine_cs *engine =
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container_of(b, struct intel_engine_cs, breadcrumbs);
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struct drm_i915_private *i915 = engine->i915;
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assert_spin_locked(&b->lock);
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if (b->rpm_wakelock)
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return;
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/* Since we are waiting on a request, the GPU should be busy
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* and should have its own rpm reference. For completeness,
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* record an rpm reference for ourselves to cover the
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* interrupt we unmask.
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*/
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intel_runtime_pm_get_noresume(i915);
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b->rpm_wakelock = true;
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/* No interrupts? Kick the waiter every jiffie! */
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if (intel_irqs_enabled(i915)) {
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if (!test_bit(engine->id, &i915->gpu_error.test_irq_rings))
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irq_enable(engine);
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b->irq_enabled = true;
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}
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if (!b->irq_enabled ||
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test_bit(engine->id, &i915->gpu_error.missed_irq_rings)) {
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mod_timer(&b->fake_irq, jiffies + 1);
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} else {
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/* Ensure we never sleep indefinitely */
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GEM_BUG_ON(!time_after(b->timeout, jiffies));
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mod_timer(&b->hangcheck, b->timeout);
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}
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}
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static void __intel_breadcrumbs_disable_irq(struct intel_breadcrumbs *b)
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{
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struct intel_engine_cs *engine =
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container_of(b, struct intel_engine_cs, breadcrumbs);
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assert_spin_locked(&b->lock);
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if (!b->rpm_wakelock)
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return;
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if (b->irq_enabled) {
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irq_disable(engine);
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b->irq_enabled = false;
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}
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intel_runtime_pm_put(engine->i915);
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b->rpm_wakelock = false;
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}
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static inline struct intel_wait *to_wait(struct rb_node *node)
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{
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return container_of(node, struct intel_wait, node);
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}
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static inline void __intel_breadcrumbs_finish(struct intel_breadcrumbs *b,
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struct intel_wait *wait)
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{
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assert_spin_locked(&b->lock);
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/* This request is completed, so remove it from the tree, mark it as
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* complete, and *then* wake up the associated task.
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*/
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rb_erase(&wait->node, &b->waiters);
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RB_CLEAR_NODE(&wait->node);
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wake_up_process(wait->tsk); /* implicit smp_wmb() */
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}
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static bool __intel_engine_add_wait(struct intel_engine_cs *engine,
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struct intel_wait *wait)
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{
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struct intel_breadcrumbs *b = &engine->breadcrumbs;
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struct rb_node **p, *parent, *completed;
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bool first;
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u32 seqno;
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/* Insert the request into the retirement ordered list
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* of waiters by walking the rbtree. If we are the oldest
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* seqno in the tree (the first to be retired), then
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* set ourselves as the bottom-half.
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*
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* As we descend the tree, prune completed branches since we hold the
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* spinlock we know that the first_waiter must be delayed and can
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* reduce some of the sequential wake up latency if we take action
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* ourselves and wake up the completed tasks in parallel. Also, by
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* removing stale elements in the tree, we may be able to reduce the
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* ping-pong between the old bottom-half and ourselves as first-waiter.
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*/
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first = true;
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parent = NULL;
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completed = NULL;
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seqno = intel_engine_get_seqno(engine);
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/* If the request completed before we managed to grab the spinlock,
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* return now before adding ourselves to the rbtree. We let the
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* current bottom-half handle any pending wakeups and instead
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* try and get out of the way quickly.
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*/
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if (i915_seqno_passed(seqno, wait->seqno)) {
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RB_CLEAR_NODE(&wait->node);
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return first;
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}
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p = &b->waiters.rb_node;
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while (*p) {
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parent = *p;
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if (wait->seqno == to_wait(parent)->seqno) {
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/* We have multiple waiters on the same seqno, select
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* the highest priority task (that with the smallest
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* task->prio) to serve as the bottom-half for this
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* group.
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*/
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if (wait->tsk->prio > to_wait(parent)->tsk->prio) {
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p = &parent->rb_right;
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first = false;
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} else {
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p = &parent->rb_left;
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}
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} else if (i915_seqno_passed(wait->seqno,
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to_wait(parent)->seqno)) {
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p = &parent->rb_right;
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if (i915_seqno_passed(seqno, to_wait(parent)->seqno))
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completed = parent;
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else
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first = false;
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} else {
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p = &parent->rb_left;
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}
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}
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rb_link_node(&wait->node, parent, p);
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rb_insert_color(&wait->node, &b->waiters);
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GEM_BUG_ON(!first && !rcu_access_pointer(b->irq_seqno_bh));
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if (completed) {
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struct rb_node *next = rb_next(completed);
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GEM_BUG_ON(!next && !first);
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if (next && next != &wait->node) {
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GEM_BUG_ON(first);
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b->timeout = wait_timeout();
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b->first_wait = to_wait(next);
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rcu_assign_pointer(b->irq_seqno_bh, b->first_wait->tsk);
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/* As there is a delay between reading the current
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* seqno, processing the completed tasks and selecting
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* the next waiter, we may have missed the interrupt
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* and so need for the next bottom-half to wakeup.
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*
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* Also as we enable the IRQ, we may miss the
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* interrupt for that seqno, so we have to wake up
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* the next bottom-half in order to do a coherent check
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* in case the seqno passed.
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*/
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__intel_breadcrumbs_enable_irq(b);
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if (READ_ONCE(b->irq_posted))
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wake_up_process(to_wait(next)->tsk);
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}
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do {
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struct intel_wait *crumb = to_wait(completed);
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completed = rb_prev(completed);
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__intel_breadcrumbs_finish(b, crumb);
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} while (completed);
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}
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if (first) {
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GEM_BUG_ON(rb_first(&b->waiters) != &wait->node);
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b->timeout = wait_timeout();
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b->first_wait = wait;
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rcu_assign_pointer(b->irq_seqno_bh, wait->tsk);
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/* After assigning ourselves as the new bottom-half, we must
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* perform a cursory check to prevent a missed interrupt.
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* Either we miss the interrupt whilst programming the hardware,
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* or if there was a previous waiter (for a later seqno) they
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* may be woken instead of us (due to the inherent race
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* in the unlocked read of b->irq_seqno_bh in the irq handler)
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* and so we miss the wake up.
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*/
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__intel_breadcrumbs_enable_irq(b);
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}
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GEM_BUG_ON(!rcu_access_pointer(b->irq_seqno_bh));
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GEM_BUG_ON(!b->first_wait);
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GEM_BUG_ON(rb_first(&b->waiters) != &b->first_wait->node);
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return first;
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}
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bool intel_engine_add_wait(struct intel_engine_cs *engine,
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struct intel_wait *wait)
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{
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struct intel_breadcrumbs *b = &engine->breadcrumbs;
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bool first;
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spin_lock(&b->lock);
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first = __intel_engine_add_wait(engine, wait);
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spin_unlock(&b->lock);
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return first;
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}
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static inline bool chain_wakeup(struct rb_node *rb, int priority)
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{
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return rb && to_wait(rb)->tsk->prio <= priority;
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}
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static inline int wakeup_priority(struct intel_breadcrumbs *b,
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struct task_struct *tsk)
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{
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if (tsk == b->signaler)
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return INT_MIN;
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else
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return tsk->prio;
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}
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void intel_engine_remove_wait(struct intel_engine_cs *engine,
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struct intel_wait *wait)
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{
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struct intel_breadcrumbs *b = &engine->breadcrumbs;
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/* Quick check to see if this waiter was already decoupled from
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* the tree by the bottom-half to avoid contention on the spinlock
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* by the herd.
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*/
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if (RB_EMPTY_NODE(&wait->node))
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return;
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spin_lock(&b->lock);
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if (RB_EMPTY_NODE(&wait->node))
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goto out_unlock;
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if (b->first_wait == wait) {
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const int priority = wakeup_priority(b, wait->tsk);
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struct rb_node *next;
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GEM_BUG_ON(rcu_access_pointer(b->irq_seqno_bh) != wait->tsk);
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/* We are the current bottom-half. Find the next candidate,
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* the first waiter in the queue on the remaining oldest
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* request. As multiple seqnos may complete in the time it
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* takes us to wake up and find the next waiter, we have to
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* wake up that waiter for it to perform its own coherent
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* completion check.
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*/
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next = rb_next(&wait->node);
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if (chain_wakeup(next, priority)) {
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/* If the next waiter is already complete,
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* wake it up and continue onto the next waiter. So
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* if have a small herd, they will wake up in parallel
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* rather than sequentially, which should reduce
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* the overall latency in waking all the completed
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* clients.
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*
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* However, waking up a chain adds extra latency to
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* the first_waiter. This is undesirable if that
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* waiter is a high priority task.
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*/
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u32 seqno = intel_engine_get_seqno(engine);
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while (i915_seqno_passed(seqno, to_wait(next)->seqno)) {
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struct rb_node *n = rb_next(next);
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__intel_breadcrumbs_finish(b, to_wait(next));
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next = n;
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if (!chain_wakeup(next, priority))
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break;
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}
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}
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if (next) {
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/* In our haste, we may have completed the first waiter
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* before we enabled the interrupt. Do so now as we
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* have a second waiter for a future seqno. Afterwards,
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* we have to wake up that waiter in case we missed
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* the interrupt, or if we have to handle an
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* exception rather than a seqno completion.
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*/
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b->timeout = wait_timeout();
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b->first_wait = to_wait(next);
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rcu_assign_pointer(b->irq_seqno_bh, b->first_wait->tsk);
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if (b->first_wait->seqno != wait->seqno)
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__intel_breadcrumbs_enable_irq(b);
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wake_up_process(b->first_wait->tsk);
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} else {
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b->first_wait = NULL;
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rcu_assign_pointer(b->irq_seqno_bh, NULL);
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__intel_breadcrumbs_disable_irq(b);
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}
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} else {
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GEM_BUG_ON(rb_first(&b->waiters) == &wait->node);
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}
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GEM_BUG_ON(RB_EMPTY_NODE(&wait->node));
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rb_erase(&wait->node, &b->waiters);
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out_unlock:
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GEM_BUG_ON(b->first_wait == wait);
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GEM_BUG_ON(rb_first(&b->waiters) !=
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(b->first_wait ? &b->first_wait->node : NULL));
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GEM_BUG_ON(!rcu_access_pointer(b->irq_seqno_bh) ^ RB_EMPTY_ROOT(&b->waiters));
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spin_unlock(&b->lock);
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}
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static bool signal_complete(struct drm_i915_gem_request *request)
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{
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if (!request)
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return false;
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/* If another process served as the bottom-half it may have already
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* signalled that this wait is already completed.
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*/
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if (intel_wait_complete(&request->signaling.wait))
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return true;
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/* Carefully check if the request is complete, giving time for the
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* seqno to be visible or if the GPU hung.
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*/
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if (__i915_request_irq_complete(request))
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return true;
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return false;
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}
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static struct drm_i915_gem_request *to_signaler(struct rb_node *rb)
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{
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return container_of(rb, struct drm_i915_gem_request, signaling.node);
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}
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static void signaler_set_rtpriority(void)
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{
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struct sched_param param = { .sched_priority = 1 };
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sched_setscheduler_nocheck(current, SCHED_FIFO, ¶m);
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}
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static int intel_breadcrumbs_signaler(void *arg)
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{
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struct intel_engine_cs *engine = arg;
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struct intel_breadcrumbs *b = &engine->breadcrumbs;
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struct drm_i915_gem_request *request;
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/* Install ourselves with high priority to reduce signalling latency */
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signaler_set_rtpriority();
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do {
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set_current_state(TASK_INTERRUPTIBLE);
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/* We are either woken up by the interrupt bottom-half,
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* or by a client adding a new signaller. In both cases,
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* the GPU seqno may have advanced beyond our oldest signal.
|
|
* If it has, propagate the signal, remove the waiter and
|
|
* check again with the next oldest signal. Otherwise we
|
|
* need to wait for a new interrupt from the GPU or for
|
|
* a new client.
|
|
*/
|
|
request = READ_ONCE(b->first_signal);
|
|
if (signal_complete(request)) {
|
|
/* Wake up all other completed waiters and select the
|
|
* next bottom-half for the next user interrupt.
|
|
*/
|
|
intel_engine_remove_wait(engine,
|
|
&request->signaling.wait);
|
|
|
|
local_bh_disable();
|
|
fence_signal(&request->fence);
|
|
local_bh_enable(); /* kick start the tasklets */
|
|
|
|
/* Find the next oldest signal. Note that as we have
|
|
* not been holding the lock, another client may
|
|
* have installed an even older signal than the one
|
|
* we just completed - so double check we are still
|
|
* the oldest before picking the next one.
|
|
*/
|
|
spin_lock(&b->lock);
|
|
if (request == b->first_signal) {
|
|
struct rb_node *rb =
|
|
rb_next(&request->signaling.node);
|
|
b->first_signal = rb ? to_signaler(rb) : NULL;
|
|
}
|
|
rb_erase(&request->signaling.node, &b->signals);
|
|
spin_unlock(&b->lock);
|
|
|
|
i915_gem_request_put(request);
|
|
} else {
|
|
if (kthread_should_stop())
|
|
break;
|
|
|
|
schedule();
|
|
}
|
|
} while (1);
|
|
__set_current_state(TASK_RUNNING);
|
|
|
|
return 0;
|
|
}
|
|
|
|
void intel_engine_enable_signaling(struct drm_i915_gem_request *request)
|
|
{
|
|
struct intel_engine_cs *engine = request->engine;
|
|
struct intel_breadcrumbs *b = &engine->breadcrumbs;
|
|
struct rb_node *parent, **p;
|
|
bool first, wakeup;
|
|
|
|
/* locked by fence_enable_sw_signaling() */
|
|
assert_spin_locked(&request->lock);
|
|
|
|
request->signaling.wait.tsk = b->signaler;
|
|
request->signaling.wait.seqno = request->fence.seqno;
|
|
i915_gem_request_get(request);
|
|
|
|
spin_lock(&b->lock);
|
|
|
|
/* First add ourselves into the list of waiters, but register our
|
|
* bottom-half as the signaller thread. As per usual, only the oldest
|
|
* waiter (not just signaller) is tasked as the bottom-half waking
|
|
* up all completed waiters after the user interrupt.
|
|
*
|
|
* If we are the oldest waiter, enable the irq (after which we
|
|
* must double check that the seqno did not complete).
|
|
*/
|
|
wakeup = __intel_engine_add_wait(engine, &request->signaling.wait);
|
|
|
|
/* Now insert ourselves into the retirement ordered list of signals
|
|
* on this engine. We track the oldest seqno as that will be the
|
|
* first signal to complete.
|
|
*/
|
|
parent = NULL;
|
|
first = true;
|
|
p = &b->signals.rb_node;
|
|
while (*p) {
|
|
parent = *p;
|
|
if (i915_seqno_passed(request->fence.seqno,
|
|
to_signaler(parent)->fence.seqno)) {
|
|
p = &parent->rb_right;
|
|
first = false;
|
|
} else {
|
|
p = &parent->rb_left;
|
|
}
|
|
}
|
|
rb_link_node(&request->signaling.node, parent, p);
|
|
rb_insert_color(&request->signaling.node, &b->signals);
|
|
if (first)
|
|
smp_store_mb(b->first_signal, request);
|
|
|
|
spin_unlock(&b->lock);
|
|
|
|
if (wakeup)
|
|
wake_up_process(b->signaler);
|
|
}
|
|
|
|
int intel_engine_init_breadcrumbs(struct intel_engine_cs *engine)
|
|
{
|
|
struct intel_breadcrumbs *b = &engine->breadcrumbs;
|
|
struct task_struct *tsk;
|
|
|
|
spin_lock_init(&b->lock);
|
|
setup_timer(&b->fake_irq,
|
|
intel_breadcrumbs_fake_irq,
|
|
(unsigned long)engine);
|
|
setup_timer(&b->hangcheck,
|
|
intel_breadcrumbs_hangcheck,
|
|
(unsigned long)engine);
|
|
|
|
/* Spawn a thread to provide a common bottom-half for all signals.
|
|
* As this is an asynchronous interface we cannot steal the current
|
|
* task for handling the bottom-half to the user interrupt, therefore
|
|
* we create a thread to do the coherent seqno dance after the
|
|
* interrupt and then signal the waitqueue (via the dma-buf/fence).
|
|
*/
|
|
tsk = kthread_run(intel_breadcrumbs_signaler, engine,
|
|
"i915/signal:%d", engine->id);
|
|
if (IS_ERR(tsk))
|
|
return PTR_ERR(tsk);
|
|
|
|
b->signaler = tsk;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void cancel_fake_irq(struct intel_engine_cs *engine)
|
|
{
|
|
struct intel_breadcrumbs *b = &engine->breadcrumbs;
|
|
|
|
del_timer_sync(&b->hangcheck);
|
|
del_timer_sync(&b->fake_irq);
|
|
clear_bit(engine->id, &engine->i915->gpu_error.missed_irq_rings);
|
|
}
|
|
|
|
void intel_engine_reset_breadcrumbs(struct intel_engine_cs *engine)
|
|
{
|
|
struct intel_breadcrumbs *b = &engine->breadcrumbs;
|
|
|
|
cancel_fake_irq(engine);
|
|
spin_lock(&b->lock);
|
|
|
|
__intel_breadcrumbs_disable_irq(b);
|
|
if (intel_engine_has_waiter(engine)) {
|
|
b->timeout = wait_timeout();
|
|
__intel_breadcrumbs_enable_irq(b);
|
|
if (READ_ONCE(b->irq_posted))
|
|
wake_up_process(b->first_wait->tsk);
|
|
} else {
|
|
/* sanitize the IMR and unmask any auxiliary interrupts */
|
|
irq_disable(engine);
|
|
}
|
|
|
|
spin_unlock(&b->lock);
|
|
}
|
|
|
|
void intel_engine_fini_breadcrumbs(struct intel_engine_cs *engine)
|
|
{
|
|
struct intel_breadcrumbs *b = &engine->breadcrumbs;
|
|
|
|
if (!IS_ERR_OR_NULL(b->signaler))
|
|
kthread_stop(b->signaler);
|
|
|
|
cancel_fake_irq(engine);
|
|
}
|
|
|
|
unsigned int intel_kick_waiters(struct drm_i915_private *i915)
|
|
{
|
|
struct intel_engine_cs *engine;
|
|
enum intel_engine_id id;
|
|
unsigned int mask = 0;
|
|
|
|
/* To avoid the task_struct disappearing beneath us as we wake up
|
|
* the process, we must first inspect the task_struct->state under the
|
|
* RCU lock, i.e. as we call wake_up_process() we must be holding the
|
|
* rcu_read_lock().
|
|
*/
|
|
for_each_engine(engine, i915, id)
|
|
if (unlikely(intel_engine_wakeup(engine)))
|
|
mask |= intel_engine_flag(engine);
|
|
|
|
return mask;
|
|
}
|
|
|
|
unsigned int intel_kick_signalers(struct drm_i915_private *i915)
|
|
{
|
|
struct intel_engine_cs *engine;
|
|
enum intel_engine_id id;
|
|
unsigned int mask = 0;
|
|
|
|
for_each_engine(engine, i915, id) {
|
|
if (unlikely(READ_ONCE(engine->breadcrumbs.first_signal))) {
|
|
wake_up_process(engine->breadcrumbs.signaler);
|
|
mask |= intel_engine_flag(engine);
|
|
}
|
|
}
|
|
|
|
return mask;
|
|
}
|