linux/drivers/pci
Alan Mikhak 668b4490a3 PCI: dwc: Program outbound ATU upper limit register
Function dw_pcie_prog_outbound_atu_unroll() does not program the upper
32-bit ATU limit register. Since ATU programming functions limit the
size of the translated region to 4GB by using a u32 size parameter,
these issues may combine into undefined behavior for resource sizes
with non-zero upper 32-bits.

For example, a 128GB address space starting at physical CPU address of
0x2000000000 with size of 0x2000000000 needs the following values
programmed into the lower and upper 32-bit limit registers:
 0x3fffffff in the upper 32-bit limit register
 0xffffffff in the lower 32-bit limit register

Currently, only the lower 32-bit limit register is programmed with a
value of 0xffffffff but the upper 32-bit limit register is not being
programmed. As a result, the upper 32-bit limit register remains at its
default value after reset of 0x0.

These issues may combine to produce undefined behavior since the ATU
limit address may be lower than the ATU base address. Programming the
upper ATU limit address register prevents such undefined behavior despite
the region size getting truncated due to the 32-bit size limit.

Link: https://lore.kernel.org/r/1585785493-23210-1-git-send-email-alan.mikhak@sifive.com
Signed-off-by: Alan Mikhak <alan.mikhak@sifive.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
2020-05-22 15:05:23 +01:00
..
controller PCI: dwc: Program outbound ATU upper limit register 2020-05-22 15:05:23 +01:00
endpoint PCI: dwc: Fix dw_pcie_ep_raise_msix_irq() to get correct MSI-X table address 2020-04-02 17:57:10 +01:00
hotplug powerpc updates for 5.7 2020-04-05 11:12:59 -07:00
pcie pci-v5.7-changes 2020-04-03 14:25:02 -07:00
switch pci/switchtec: Replace completion wait queue usage for poll 2020-03-21 16:00:20 +01:00
access.c PCI/AER: Save AER Capability for suspend/resume 2019-10-18 17:05:42 -05:00
ats.c PCI/ATS: Export symbols of PASID functions 2020-03-18 21:32:25 +00:00
bus.c
ecam.c
host-bridge.c
iov.c PCI/IOV: Fix memory leak in pci_iov_add_virtfn() 2019-12-09 15:51:32 -06:00
irq.c
Kconfig Merge branch 'pci/trivial' 2019-11-28 08:54:55 -06:00
Makefile PCI: Allow building PCIe things without PCIEPORTBUS 2019-11-21 07:52:33 -06:00
mmap.c
msi.c remove ioremap_nocache and devm_ioremap_nocache 2020-01-06 09:45:59 +01:00
of.c PCI: Make devm_of_pci_get_host_bridge_resources() static 2019-11-20 17:00:14 +00:00
p2pdma.c PCI/P2PDMA: Add Intel Sky Lake-E Root Ports B, C, D to the whitelist 2020-03-18 18:09:07 -05:00
pci-acpi.c Merge branch 'pci/misc' 2020-04-02 14:26:38 -05:00
pci-bridge-emul.c PCI: pci-bridge-emul: Use new constant PCI_STATUS_ERROR_BITS 2020-03-04 14:21:00 -08:00
pci-bridge-emul.h PCI: pci-bridge-emul: Fix big-endian support 2019-10-17 12:42:48 +01:00
pci-driver.c PCI/PM: Add missing link delays required by the PCIe spec 2019-11-20 17:37:24 -06:00
pci-label.c
pci-mid.c PCI: intel-mid: Convert to new X86 CPU match macros 2020-03-24 21:35:06 +01:00
pci-pf-stub.c
pci-stub.c
pci-sysfs.c Merge branch 'pci/misc' 2020-04-02 14:26:38 -05:00
pci.c pci-v5.7-changes 2020-04-03 14:25:02 -07:00
pci.h Merge branch 'pci/enumeration' 2020-04-02 14:26:32 -05:00
probe.c Merge branch 'pci/enumeration' 2020-04-02 14:26:32 -05:00
proc.c proc: convert everything to "struct proc_ops" 2020-02-04 03:05:26 +00:00
quirks.c Merge branch 'pci/virtualization' 2020-04-02 14:26:45 -05:00
remove.c
rom.c PCI: Use ioremap(), not phys_to_virt() for platform ROM 2020-03-30 09:52:23 -05:00
search.c Merge branch 'pci/host-vmd' 2020-01-29 17:00:02 -06:00
setup-bus.c PCI: Add support for root bus sizing 2020-03-30 09:52:34 -05:00
setup-irq.c
setup-res.c
slot.c PCI: Add pci_speed_string() 2020-03-10 14:05:33 -05:00
syscall.c
vc.c Merge branch 'pci/trivial' 2019-09-23 16:10:31 -05:00
vpd.c PCI/VPD: Prevent VPD access for Amazon's Annapurna Labs Root Port 2019-09-16 14:10:09 +01:00
xen-pcifront.c