032838f9cb
This is required for the panel to work on bcm911360, where CLCDCLK is
the fixed 200Mhz AXI41 clock. The rate set is still passed up to the
CLCDCLK, for platforms that have a settable rate on that one.
v2: Set SET_RATE_PARENT (caught by Linus Walleij), depend on
COMMON_CLK.
v3: Mark the clk_ops static (caught by Stephen).
Signed-off-by: Eric Anholt <eric@anholt.net>
Link: http://patchwork.freedesktop.org/patch/msgid/20170508193348.30236-1-eric@anholt.net
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
14 lines
410 B
Plaintext
14 lines
410 B
Plaintext
config DRM_PL111
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tristate "DRM Support for PL111 CLCD Controller"
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depends on DRM
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depends on ARM || ARM64 || COMPILE_TEST
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depends on COMMON_CLK
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select DRM_KMS_HELPER
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select DRM_KMS_CMA_HELPER
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select DRM_GEM_CMA_HELPER
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select VT_HW_CONSOLE_BINDING if FRAMEBUFFER_CONSOLE
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help
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Choose this option for DRM support for the PL111 CLCD controller.
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If M is selected the module will be called pl111_drm.
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