160 lines
7.1 KiB
C
160 lines
7.1 KiB
C
/*
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* Copyright 2012 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Ben Skeggs
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*/
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#include "priv.h"
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int
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gm100_identify(struct nvkm_device *device)
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{
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switch (device->chipset) {
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case 0x117:
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device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = gf110_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_FUSE ] = &gm107_fuse_oclass;
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device->oclass[NVDEV_SUBDEV_THERM ] = &gm107_therm_oclass;
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device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
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device->oclass[NVDEV_SUBDEV_DEVINIT] = gm107_devinit_oclass;
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device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass;
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device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass;
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device->oclass[NVDEV_SUBDEV_FB ] = gm107_fb_oclass;
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device->oclass[NVDEV_SUBDEV_LTC ] = gm107_ltc_oclass;
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device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass;
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device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
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device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
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device->oclass[NVDEV_SUBDEV_PMU ] = gk208_pmu_oclass;
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#if 0
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device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
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#endif
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device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
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device->oclass[NVDEV_ENGINE_FIFO ] = gk208_fifo_oclass;
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device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass;
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device->oclass[NVDEV_ENGINE_GR ] = gm107_gr_oclass;
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device->oclass[NVDEV_ENGINE_DISP ] = gm107_disp_oclass;
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device->oclass[NVDEV_ENGINE_CE0 ] = &gk104_ce0_oclass;
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#if 0
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device->oclass[NVDEV_ENGINE_CE1 ] = &gk104_ce1_oclass;
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#endif
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device->oclass[NVDEV_ENGINE_CE2 ] = &gk104_ce2_oclass;
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#if 0
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device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass;
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device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
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device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
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#endif
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break;
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case 0x124:
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device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = gm204_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_FUSE ] = &gm107_fuse_oclass;
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#if 0
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/* looks to be some non-trivial changes */
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/* priv ring says no to 0x10eb14 writes */
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device->oclass[NVDEV_SUBDEV_THERM ] = &gm107_therm_oclass;
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#endif
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device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
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device->oclass[NVDEV_SUBDEV_DEVINIT] = gm204_devinit_oclass;
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device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass;
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device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass;
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device->oclass[NVDEV_SUBDEV_FB ] = gm107_fb_oclass;
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device->oclass[NVDEV_SUBDEV_LTC ] = gm107_ltc_oclass;
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device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass;
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device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
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device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
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device->oclass[NVDEV_SUBDEV_PMU ] = gk208_pmu_oclass;
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#if 0
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device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
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#endif
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device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
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device->oclass[NVDEV_ENGINE_FIFO ] = gm204_fifo_oclass;
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device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass;
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device->oclass[NVDEV_ENGINE_GR ] = gm204_gr_oclass;
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device->oclass[NVDEV_ENGINE_DISP ] = gm204_disp_oclass;
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device->oclass[NVDEV_ENGINE_CE0 ] = &gm204_ce0_oclass;
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device->oclass[NVDEV_ENGINE_CE1 ] = &gm204_ce1_oclass;
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device->oclass[NVDEV_ENGINE_CE2 ] = &gm204_ce2_oclass;
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#if 0
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device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass;
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device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
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device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
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#endif
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break;
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case 0x126:
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device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
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device->oclass[NVDEV_SUBDEV_I2C ] = gm204_i2c_oclass;
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device->oclass[NVDEV_SUBDEV_FUSE ] = &gm107_fuse_oclass;
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#if 0
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/* looks to be some non-trivial changes */
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/* priv ring says no to 0x10eb14 writes */
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device->oclass[NVDEV_SUBDEV_THERM ] = &gm107_therm_oclass;
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#endif
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device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
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device->oclass[NVDEV_SUBDEV_DEVINIT] = gm204_devinit_oclass;
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device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass;
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device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass;
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device->oclass[NVDEV_SUBDEV_FB ] = gm107_fb_oclass;
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device->oclass[NVDEV_SUBDEV_LTC ] = gm107_ltc_oclass;
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device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass;
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device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
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device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
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device->oclass[NVDEV_SUBDEV_PMU ] = gk208_pmu_oclass;
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#if 0
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device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
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#endif
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device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
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device->oclass[NVDEV_ENGINE_FIFO ] = gm204_fifo_oclass;
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device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass;
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device->oclass[NVDEV_ENGINE_GR ] = gm206_gr_oclass;
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device->oclass[NVDEV_ENGINE_DISP ] = gm204_disp_oclass;
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device->oclass[NVDEV_ENGINE_CE0 ] = &gm204_ce0_oclass;
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device->oclass[NVDEV_ENGINE_CE1 ] = &gm204_ce1_oclass;
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device->oclass[NVDEV_ENGINE_CE2 ] = &gm204_ce2_oclass;
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#if 0
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device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass;
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device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
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device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
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#endif
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break;
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case 0x12b:
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device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass;
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device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
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device->oclass[NVDEV_SUBDEV_FUSE ] = &gm107_fuse_oclass;
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device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass;
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device->oclass[NVDEV_SUBDEV_FB ] = gk20a_fb_oclass;
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device->oclass[NVDEV_SUBDEV_LTC ] = gm107_ltc_oclass;
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device->oclass[NVDEV_SUBDEV_IBUS ] = &gk20a_ibus_oclass;
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device->oclass[NVDEV_SUBDEV_INSTMEM] = gk20a_instmem_oclass;
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device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
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device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
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device->oclass[NVDEV_ENGINE_FIFO ] = gm20b_fifo_oclass;
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device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass;
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device->oclass[NVDEV_ENGINE_GR ] = gm20b_gr_oclass;
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device->oclass[NVDEV_ENGINE_CE2 ] = &gm204_ce2_oclass;
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break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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