65d0cf0be7
Map shared data structure that will hold CPU registers, VPMU context, V/PCPU IDs of the CPU interrupted by PMU interrupt. Hypervisor fills this information in its handler and passes it to the guest for further processing. Set up PMU VIRQ. Now that perf infrastructure will assume that PMU is available on a PV guest we need to be careful and make sure that accesses via RDPMC instruction don't cause fatal traps by the hypervisor. Provide a nop RDPMC handler. For the same reason avoid issuing a warning on a write to APIC's LVTPC. Both of these will be made functional in later patches. Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com> Reviewed-by: David Vrabel <david.vrabel@citrix.com> Signed-off-by: David Vrabel <david.vrabel@citrix.com>
93 lines
2.4 KiB
C
93 lines
2.4 KiB
C
#ifndef __XEN_PUBLIC_XENPMU_H__
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#define __XEN_PUBLIC_XENPMU_H__
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#include "xen.h"
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#define XENPMU_VER_MAJ 0
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#define XENPMU_VER_MIN 1
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/*
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* ` enum neg_errnoval
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* ` HYPERVISOR_xenpmu_op(enum xenpmu_op cmd, struct xenpmu_params *args);
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*
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* @cmd == XENPMU_* (PMU operation)
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* @args == struct xenpmu_params
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*/
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/* ` enum xenpmu_op { */
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#define XENPMU_mode_get 0 /* Also used for getting PMU version */
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#define XENPMU_mode_set 1
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#define XENPMU_feature_get 2
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#define XENPMU_feature_set 3
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#define XENPMU_init 4
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#define XENPMU_finish 5
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/* ` } */
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/* Parameters structure for HYPERVISOR_xenpmu_op call */
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struct xen_pmu_params {
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/* IN/OUT parameters */
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struct {
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uint32_t maj;
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uint32_t min;
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} version;
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uint64_t val;
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/* IN parameters */
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uint32_t vcpu;
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uint32_t pad;
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};
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/* PMU modes:
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* - XENPMU_MODE_OFF: No PMU virtualization
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* - XENPMU_MODE_SELF: Guests can profile themselves
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* - XENPMU_MODE_HV: Guests can profile themselves, dom0 profiles
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* itself and Xen
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* - XENPMU_MODE_ALL: Only dom0 has access to VPMU and it profiles
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* everyone: itself, the hypervisor and the guests.
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*/
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#define XENPMU_MODE_OFF 0
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#define XENPMU_MODE_SELF (1<<0)
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#define XENPMU_MODE_HV (1<<1)
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#define XENPMU_MODE_ALL (1<<2)
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/*
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* PMU features:
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* - XENPMU_FEATURE_INTEL_BTS: Intel BTS support (ignored on AMD)
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*/
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#define XENPMU_FEATURE_INTEL_BTS 1
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/*
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* Shared PMU data between hypervisor and PV(H) domains.
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*
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* The hypervisor fills out this structure during PMU interrupt and sends an
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* interrupt to appropriate VCPU.
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* Architecture-independent fields of xen_pmu_data are WO for the hypervisor
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* and RO for the guest but some fields in xen_pmu_arch can be writable
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* by both the hypervisor and the guest (see arch-$arch/pmu.h).
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*/
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struct xen_pmu_data {
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/* Interrupted VCPU */
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uint32_t vcpu_id;
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/*
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* Physical processor on which the interrupt occurred. On non-privileged
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* guests set to vcpu_id;
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*/
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uint32_t pcpu_id;
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/*
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* Domain that was interrupted. On non-privileged guests set to
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* DOMID_SELF.
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* On privileged guests can be DOMID_SELF, DOMID_XEN, or, when in
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* XENPMU_MODE_ALL mode, domain ID of another domain.
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*/
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domid_t domain_id;
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uint8_t pad[6];
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/* Architecture-specific information */
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struct xen_pmu_arch pmu;
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};
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#endif /* __XEN_PUBLIC_XENPMU_H__ */
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