649c6059d2
To slove the issue which was found on gru board for hs400. [ 4.616946] sdhci: Secure Digital Host Controller Interface driver [ 4.623135] sdhci: Copyright(c) Pierre Ossman [ 4.722575] sdhci-pltfm: SDHCI platform and OF driver helper [ 4.730962] sdhci-arasan fe330000.sdhci: No vmmc regulator found [ 4.737444] sdhci-arasan fe330000.sdhci: No vqmmc regulator found [ 4.774930] mmc0: SDHCI controller on fe330000.sdhci [fe330000.sdhci] using ADMA [ 4.980295] mmc0: switch to high-speed from hs200 failed, err:-84 [ 4.986487] mmc0: error -84 whilst initialising MMC card We should change HS400 mode selection timing to meet JEDEC specification. The JEDEC 5.1 said that change the frequency to <= 52MHZ after HS_TIMING switch. Refer to section 6.6.2.3 "HS400" timing mode selection: Set the "Timing Interface" parameter in the HS_TIMING[185] field of the Extended CSD register to 0x1 to switch to High Speed mode and then set the clock frequency to a value not greater than 52MHZ. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> |
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.. | ||
bus.c | ||
bus.h | ||
core.c | ||
core.h | ||
debugfs.c | ||
host.c | ||
host.h | ||
Kconfig | ||
Makefile | ||
mmc_ops.c | ||
mmc_ops.h | ||
mmc.c | ||
pwrseq_emmc.c | ||
pwrseq_simple.c | ||
pwrseq.c | ||
pwrseq.h | ||
quirks.c | ||
sd_ops.c | ||
sd_ops.h | ||
sd.c | ||
sd.h | ||
sdio_bus.c | ||
sdio_bus.h | ||
sdio_cis.c | ||
sdio_cis.h | ||
sdio_io.c | ||
sdio_irq.c | ||
sdio_ops.c | ||
sdio_ops.h | ||
sdio.c | ||
slot-gpio.c | ||
slot-gpio.h |