Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
		
			
				
	
	
		
			74 lines
		
	
	
		
			1.6 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			74 lines
		
	
	
		
			1.6 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| // SPDX-License-Identifier: GPL-2.0-only
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| /*
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|  * arch/arch/mach-ixp4xx/fsg-pci.c
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|  *
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|  * FSG board-level PCI initialization
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|  *
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|  * Author: Rod Whitby <rod@whitby.id.au>
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|  * Maintainer: http://www.nslu2-linux.org/
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|  *
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|  * based on ixdp425-pci.c:
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|  *	Copyright (C) 2002 Intel Corporation.
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|  *	Copyright (C) 2003-2004 MontaVista Software, Inc.
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|  */
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| 
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| #include <linux/pci.h>
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| #include <linux/init.h>
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| #include <linux/irq.h>
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| #include <asm/mach/pci.h>
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| #include <asm/mach-types.h>
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| 
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| #include "irqs.h"
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| 
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| #define MAX_DEV		3
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| #define IRQ_LINES	3
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| 
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| /* PCI controller GPIO to IRQ pin mappings */
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| #define INTA	6
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| #define INTB	7
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| #define INTC	5
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| 
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| void __init fsg_pci_preinit(void)
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| {
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| 	irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
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| 	irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
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| 	irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
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| 	ixp4xx_pci_preinit();
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| }
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| 
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| static int __init fsg_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
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| {
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| 	static int pci_irq_table[IRQ_LINES] = {
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| 		IXP4XX_GPIO_IRQ(INTC),
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| 		IXP4XX_GPIO_IRQ(INTB),
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| 		IXP4XX_GPIO_IRQ(INTA),
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| 	};
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| 
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| 	int irq = -1;
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| 	slot -= 11;
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| 
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| 	if (slot >= 1 && slot <= MAX_DEV && pin >= 1 && pin <= IRQ_LINES)
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| 		irq = pci_irq_table[slot - 1];
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| 	printk(KERN_INFO "%s: Mapped slot %d pin %d to IRQ %d\n",
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| 	       __func__, slot, pin, irq);
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| 
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| 	return irq;
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| }
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| 
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| struct hw_pci fsg_pci __initdata = {
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| 	.nr_controllers = 1,
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| 	.ops		= &ixp4xx_ops,
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| 	.preinit =	  fsg_pci_preinit,
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| 	.setup =	  ixp4xx_setup,
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| 	.map_irq =	  fsg_map_irq,
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| };
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| 
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| int __init fsg_pci_init(void)
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| {
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| 	if (machine_is_fsg())
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| 		pci_common_init(&fsg_pci);
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| 	return 0;
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| }
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| 
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| subsys_initcall(fsg_pci_init);
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