Thierry Reding 61417aaa11 drm/tegra: sor: Unify clock setup for eDP, HDMI and DP ... With the clocks modelled consistently across SoC generations, the clock setup for eDP, HDMI and DP can now be unified. Signed-off-by: Thierry Reding <treding@nvidia.com>		2019-10-28 11:18:56 +01:00
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drm	drm/tegra: sor: Unify clock setup for eDP, HDMI and DP	2019-10-28 11:18:56 +01:00
host1x	gpu: host1x: Make host1x_cdma_wait_pushbuffer_space() static	2019-10-28 11:18:34 +01:00
ipu-v3	gpu: ipu-v3: image-convert: only sample into the next tile if necessary	2019-08-19 16:25:30 +02:00
vga
Makefile