linux/arch/mips/include/asm/mach-au1x00
pascal@pabr.org 60ec6571c5 MIPS: Support 36-bit iomem on 32-bit Au1x00
I believe these changes are needed on Alchemy SoCs in order to
use iomem above 4G with the usual platform_device machinery:

- Set CONFIG_ARCH_PHYS_ADDR_T_64BIT to make resource_size_t 64-bit.
- Increase IOMEM_RESOURCE_END so that platforms can register resources.

To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/814/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:53:17 +01:00
..
au1xxx_dbdma.h MIPS: Alchemy: change dbdma to accept physical memory addresses 2010-02-27 12:52:55 +01:00
au1xxx_eth.h MIPS: Alchemy: Add au1000-eth platform device 2010-02-27 12:53:01 +01:00
au1xxx_ide.h MIPS: au1xxx-ide: Fix build with CONFIG_PM 2009-05-14 13:50:24 +01:00
au1xxx_psc.h
au1xxx.h
au1000_dma.h
au1000.h MIPS: Support 36-bit iomem on 32-bit Au1x00 2010-02-27 12:53:17 +01:00
au1100_mmc.h MIPS: Nuke trailing blank lines 2010-02-27 12:53:14 +01:00
au1550_spi.h
cpu-feature-overrides.h MIPS: Alchemy: provide cpu feature overrides. 2009-03-30 14:49:46 +02:00
gpio-au1000.h MIPS: Alchemy: use runtime cpu detection in GPIO code. 2010-02-27 12:53:02 +01:00
gpio.h MIPS: Alchemy: Only build AU1000 INTC code for compatible cpus 2010-02-27 12:53:02 +01:00
ioremap.h
prom.h
war.h