forked from Minki/linux
60ab4361ad
Extend the fs_enet driver to support MPC512x FEC. Enable it with CONFIG_FS_ENET_MPC5121_FEC option. Signed-off-by: John Rigby <jcrigby@gmail.com> Signed-off-by: Piotr Ziecik <kosmo@semihalf.com> Signed-off-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Anatolij Gustschin <agust@denx.de> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: David S. Miller <davem@davemloft.net>
499 lines
12 KiB
C
499 lines
12 KiB
C
/*
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* Freescale Ethernet controllers
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*
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* Copyright (c) 2005 Intracom S.A.
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* by Pantelis Antoniou <panto@intracom.gr>
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*
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* 2005 (c) MontaVista Software, Inc.
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* Vitaly Bordug <vbordug@ru.mvista.com>
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/string.h>
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#include <linux/ptrace.h>
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#include <linux/errno.h>
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#include <linux/ioport.h>
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#include <linux/slab.h>
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#include <linux/interrupt.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/netdevice.h>
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#include <linux/etherdevice.h>
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#include <linux/skbuff.h>
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#include <linux/spinlock.h>
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#include <linux/mii.h>
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#include <linux/ethtool.h>
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#include <linux/bitops.h>
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#include <linux/fs.h>
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#include <linux/platform_device.h>
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#include <linux/of_device.h>
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#include <asm/irq.h>
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#include <asm/uaccess.h>
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#ifdef CONFIG_8xx
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#include <asm/8xx_immap.h>
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#include <asm/pgtable.h>
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#include <asm/mpc8xx.h>
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#include <asm/cpm1.h>
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#endif
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#include "fs_enet.h"
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#include "fec.h"
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/*************************************************/
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#if defined(CONFIG_CPM1)
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/* for a CPM1 __raw_xxx's are sufficient */
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#define __fs_out32(addr, x) __raw_writel(x, addr)
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#define __fs_out16(addr, x) __raw_writew(x, addr)
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#define __fs_in32(addr) __raw_readl(addr)
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#define __fs_in16(addr) __raw_readw(addr)
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#else
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/* for others play it safe */
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#define __fs_out32(addr, x) out_be32(addr, x)
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#define __fs_out16(addr, x) out_be16(addr, x)
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#define __fs_in32(addr) in_be32(addr)
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#define __fs_in16(addr) in_be16(addr)
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#endif
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/* write */
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#define FW(_fecp, _reg, _v) __fs_out32(&(_fecp)->fec_ ## _reg, (_v))
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/* read */
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#define FR(_fecp, _reg) __fs_in32(&(_fecp)->fec_ ## _reg)
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/* set bits */
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#define FS(_fecp, _reg, _v) FW(_fecp, _reg, FR(_fecp, _reg) | (_v))
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/* clear bits */
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#define FC(_fecp, _reg, _v) FW(_fecp, _reg, FR(_fecp, _reg) & ~(_v))
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/*
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* Delay to wait for FEC reset command to complete (in us)
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*/
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#define FEC_RESET_DELAY 50
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static int whack_reset(struct fec __iomem *fecp)
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{
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int i;
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FW(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_RESET);
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for (i = 0; i < FEC_RESET_DELAY; i++) {
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if ((FR(fecp, ecntrl) & FEC_ECNTRL_RESET) == 0)
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return 0; /* OK */
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udelay(1);
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}
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return -1;
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}
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static int do_pd_setup(struct fs_enet_private *fep)
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{
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struct of_device *ofdev = to_of_device(fep->dev);
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fep->interrupt = of_irq_to_resource(ofdev->node, 0, NULL);
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if (fep->interrupt == NO_IRQ)
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return -EINVAL;
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fep->fec.fecp = of_iomap(ofdev->node, 0);
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if (!fep->fcc.fccp)
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return -EINVAL;
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return 0;
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}
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#define FEC_NAPI_RX_EVENT_MSK (FEC_ENET_RXF | FEC_ENET_RXB)
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#define FEC_RX_EVENT (FEC_ENET_RXF)
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#define FEC_TX_EVENT (FEC_ENET_TXF)
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#define FEC_ERR_EVENT_MSK (FEC_ENET_HBERR | FEC_ENET_BABR | \
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FEC_ENET_BABT | FEC_ENET_EBERR)
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static int setup_data(struct net_device *dev)
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{
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struct fs_enet_private *fep = netdev_priv(dev);
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if (do_pd_setup(fep) != 0)
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return -EINVAL;
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fep->fec.hthi = 0;
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fep->fec.htlo = 0;
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fep->ev_napi_rx = FEC_NAPI_RX_EVENT_MSK;
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fep->ev_rx = FEC_RX_EVENT;
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fep->ev_tx = FEC_TX_EVENT;
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fep->ev_err = FEC_ERR_EVENT_MSK;
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return 0;
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}
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static int allocate_bd(struct net_device *dev)
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{
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struct fs_enet_private *fep = netdev_priv(dev);
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const struct fs_platform_info *fpi = fep->fpi;
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fep->ring_base = (void __force __iomem *)dma_alloc_coherent(fep->dev,
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(fpi->tx_ring + fpi->rx_ring) *
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sizeof(cbd_t), &fep->ring_mem_addr,
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GFP_KERNEL);
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if (fep->ring_base == NULL)
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return -ENOMEM;
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return 0;
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}
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static void free_bd(struct net_device *dev)
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{
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struct fs_enet_private *fep = netdev_priv(dev);
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const struct fs_platform_info *fpi = fep->fpi;
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if(fep->ring_base)
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dma_free_coherent(fep->dev, (fpi->tx_ring + fpi->rx_ring)
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* sizeof(cbd_t),
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(void __force *)fep->ring_base,
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fep->ring_mem_addr);
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}
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static void cleanup_data(struct net_device *dev)
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{
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/* nothing */
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}
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static void set_promiscuous_mode(struct net_device *dev)
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{
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struct fs_enet_private *fep = netdev_priv(dev);
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struct fec __iomem *fecp = fep->fec.fecp;
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FS(fecp, r_cntrl, FEC_RCNTRL_PROM);
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}
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static void set_multicast_start(struct net_device *dev)
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{
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struct fs_enet_private *fep = netdev_priv(dev);
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fep->fec.hthi = 0;
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fep->fec.htlo = 0;
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}
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static void set_multicast_one(struct net_device *dev, const u8 *mac)
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{
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struct fs_enet_private *fep = netdev_priv(dev);
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int temp, hash_index, i, j;
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u32 crc, csrVal;
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u8 byte, msb;
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crc = 0xffffffff;
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for (i = 0; i < 6; i++) {
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byte = mac[i];
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for (j = 0; j < 8; j++) {
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msb = crc >> 31;
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crc <<= 1;
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if (msb ^ (byte & 0x1))
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crc ^= FEC_CRC_POLY;
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byte >>= 1;
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}
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}
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temp = (crc & 0x3f) >> 1;
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hash_index = ((temp & 0x01) << 4) |
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((temp & 0x02) << 2) |
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((temp & 0x04)) |
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((temp & 0x08) >> 2) |
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((temp & 0x10) >> 4);
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csrVal = 1 << hash_index;
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if (crc & 1)
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fep->fec.hthi |= csrVal;
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else
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fep->fec.htlo |= csrVal;
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}
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static void set_multicast_finish(struct net_device *dev)
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{
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struct fs_enet_private *fep = netdev_priv(dev);
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struct fec __iomem *fecp = fep->fec.fecp;
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/* if all multi or too many multicasts; just enable all */
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if ((dev->flags & IFF_ALLMULTI) != 0 ||
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netdev_mc_count(dev) > FEC_MAX_MULTICAST_ADDRS) {
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fep->fec.hthi = 0xffffffffU;
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fep->fec.htlo = 0xffffffffU;
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}
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FC(fecp, r_cntrl, FEC_RCNTRL_PROM);
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FW(fecp, hash_table_high, fep->fec.hthi);
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FW(fecp, hash_table_low, fep->fec.htlo);
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}
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static void set_multicast_list(struct net_device *dev)
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{
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struct dev_mc_list *pmc;
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if ((dev->flags & IFF_PROMISC) == 0) {
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set_multicast_start(dev);
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netdev_for_each_mc_addr(pmc, dev)
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set_multicast_one(dev, pmc->dmi_addr);
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set_multicast_finish(dev);
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} else
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set_promiscuous_mode(dev);
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}
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static void restart(struct net_device *dev)
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{
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struct fs_enet_private *fep = netdev_priv(dev);
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struct fec __iomem *fecp = fep->fec.fecp;
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const struct fs_platform_info *fpi = fep->fpi;
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dma_addr_t rx_bd_base_phys, tx_bd_base_phys;
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int r;
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u32 addrhi, addrlo;
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struct mii_bus* mii = fep->phydev->bus;
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struct fec_info* fec_inf = mii->priv;
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r = whack_reset(fep->fec.fecp);
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if (r != 0)
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dev_err(fep->dev, "FEC Reset FAILED!\n");
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/*
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* Set station address.
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*/
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addrhi = ((u32) dev->dev_addr[0] << 24) |
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((u32) dev->dev_addr[1] << 16) |
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((u32) dev->dev_addr[2] << 8) |
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(u32) dev->dev_addr[3];
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addrlo = ((u32) dev->dev_addr[4] << 24) |
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((u32) dev->dev_addr[5] << 16);
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FW(fecp, addr_low, addrhi);
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FW(fecp, addr_high, addrlo);
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/*
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* Reset all multicast.
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*/
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FW(fecp, hash_table_high, fep->fec.hthi);
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FW(fecp, hash_table_low, fep->fec.htlo);
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/*
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* Set maximum receive buffer size.
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*/
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FW(fecp, r_buff_size, PKT_MAXBLR_SIZE);
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#ifdef CONFIG_FS_ENET_MPC5121_FEC
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FW(fecp, r_cntrl, PKT_MAXBUF_SIZE << 16);
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#else
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FW(fecp, r_hash, PKT_MAXBUF_SIZE);
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#endif
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/* get physical address */
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rx_bd_base_phys = fep->ring_mem_addr;
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tx_bd_base_phys = rx_bd_base_phys + sizeof(cbd_t) * fpi->rx_ring;
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/*
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* Set receive and transmit descriptor base.
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*/
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FW(fecp, r_des_start, rx_bd_base_phys);
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FW(fecp, x_des_start, tx_bd_base_phys);
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fs_init_bds(dev);
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/*
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* Enable big endian and don't care about SDMA FC.
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*/
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#ifdef CONFIG_FS_ENET_MPC5121_FEC
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FS(fecp, dma_control, 0xC0000000);
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#else
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FW(fecp, fun_code, 0x78000000);
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#endif
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/*
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* Set MII speed.
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*/
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FW(fecp, mii_speed, fec_inf->mii_speed);
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/*
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* Clear any outstanding interrupt.
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*/
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FW(fecp, ievent, 0xffc0);
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#ifndef CONFIG_FS_ENET_MPC5121_FEC
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FW(fecp, ivec, (virq_to_hw(fep->interrupt) / 2) << 29);
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FW(fecp, r_cntrl, FEC_RCNTRL_MII_MODE); /* MII enable */
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#else
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/*
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* Only set MII mode - do not touch maximum frame length
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* configured before.
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*/
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FS(fecp, r_cntrl, FEC_RCNTRL_MII_MODE);
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#endif
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/*
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* adjust to duplex mode
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*/
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if (fep->phydev->duplex) {
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FC(fecp, r_cntrl, FEC_RCNTRL_DRT);
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FS(fecp, x_cntrl, FEC_TCNTRL_FDEN); /* FD enable */
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} else {
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FS(fecp, r_cntrl, FEC_RCNTRL_DRT);
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FC(fecp, x_cntrl, FEC_TCNTRL_FDEN); /* FD disable */
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}
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/*
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* Enable interrupts we wish to service.
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*/
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FW(fecp, imask, FEC_ENET_TXF | FEC_ENET_TXB |
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FEC_ENET_RXF | FEC_ENET_RXB);
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/*
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* And last, enable the transmit and receive processing.
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*/
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FW(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_ETHER_EN);
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FW(fecp, r_des_active, 0x01000000);
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}
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static void stop(struct net_device *dev)
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{
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struct fs_enet_private *fep = netdev_priv(dev);
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const struct fs_platform_info *fpi = fep->fpi;
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struct fec __iomem *fecp = fep->fec.fecp;
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struct fec_info* feci= fep->phydev->bus->priv;
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int i;
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if ((FR(fecp, ecntrl) & FEC_ECNTRL_ETHER_EN) == 0)
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return; /* already down */
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FW(fecp, x_cntrl, 0x01); /* Graceful transmit stop */
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for (i = 0; ((FR(fecp, ievent) & 0x10000000) == 0) &&
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i < FEC_RESET_DELAY; i++)
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udelay(1);
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if (i == FEC_RESET_DELAY)
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dev_warn(fep->dev, "FEC timeout on graceful transmit stop\n");
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/*
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* Disable FEC. Let only MII interrupts.
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*/
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FW(fecp, imask, 0);
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FC(fecp, ecntrl, FEC_ECNTRL_ETHER_EN);
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fs_cleanup_bds(dev);
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/* shut down FEC1? that's where the mii bus is */
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if (fpi->has_phy) {
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FS(fecp, r_cntrl, FEC_RCNTRL_MII_MODE); /* MII enable */
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FS(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_ETHER_EN);
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FW(fecp, ievent, FEC_ENET_MII);
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FW(fecp, mii_speed, feci->mii_speed);
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}
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}
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static void napi_clear_rx_event(struct net_device *dev)
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{
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struct fs_enet_private *fep = netdev_priv(dev);
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struct fec __iomem *fecp = fep->fec.fecp;
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FW(fecp, ievent, FEC_NAPI_RX_EVENT_MSK);
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}
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static void napi_enable_rx(struct net_device *dev)
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{
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struct fs_enet_private *fep = netdev_priv(dev);
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struct fec __iomem *fecp = fep->fec.fecp;
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FS(fecp, imask, FEC_NAPI_RX_EVENT_MSK);
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}
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static void napi_disable_rx(struct net_device *dev)
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{
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struct fs_enet_private *fep = netdev_priv(dev);
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struct fec __iomem *fecp = fep->fec.fecp;
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FC(fecp, imask, FEC_NAPI_RX_EVENT_MSK);
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}
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static void rx_bd_done(struct net_device *dev)
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{
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struct fs_enet_private *fep = netdev_priv(dev);
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struct fec __iomem *fecp = fep->fec.fecp;
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FW(fecp, r_des_active, 0x01000000);
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}
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static void tx_kickstart(struct net_device *dev)
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{
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struct fs_enet_private *fep = netdev_priv(dev);
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struct fec __iomem *fecp = fep->fec.fecp;
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FW(fecp, x_des_active, 0x01000000);
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}
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static u32 get_int_events(struct net_device *dev)
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{
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struct fs_enet_private *fep = netdev_priv(dev);
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struct fec __iomem *fecp = fep->fec.fecp;
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return FR(fecp, ievent) & FR(fecp, imask);
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}
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static void clear_int_events(struct net_device *dev, u32 int_events)
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{
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struct fs_enet_private *fep = netdev_priv(dev);
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struct fec __iomem *fecp = fep->fec.fecp;
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FW(fecp, ievent, int_events);
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}
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static void ev_error(struct net_device *dev, u32 int_events)
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{
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struct fs_enet_private *fep = netdev_priv(dev);
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dev_warn(fep->dev, "FEC ERROR(s) 0x%x\n", int_events);
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}
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static int get_regs(struct net_device *dev, void *p, int *sizep)
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{
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struct fs_enet_private *fep = netdev_priv(dev);
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if (*sizep < sizeof(struct fec))
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return -EINVAL;
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memcpy_fromio(p, fep->fec.fecp, sizeof(struct fec));
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return 0;
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}
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static int get_regs_len(struct net_device *dev)
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{
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return sizeof(struct fec);
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}
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static void tx_restart(struct net_device *dev)
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{
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/* nothing */
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}
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/*************************************************************************/
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const struct fs_ops fs_fec_ops = {
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.setup_data = setup_data,
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.cleanup_data = cleanup_data,
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.set_multicast_list = set_multicast_list,
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.restart = restart,
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.stop = stop,
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.napi_clear_rx_event = napi_clear_rx_event,
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.napi_enable_rx = napi_enable_rx,
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.napi_disable_rx = napi_disable_rx,
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.rx_bd_done = rx_bd_done,
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.tx_kickstart = tx_kickstart,
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.get_int_events = get_int_events,
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.clear_int_events = clear_int_events,
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.ev_error = ev_error,
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.get_regs = get_regs,
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.get_regs_len = get_regs_len,
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.tx_restart = tx_restart,
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.allocate_bd = allocate_bd,
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.free_bd = free_bd,
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};
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