forked from Minki/linux
c02b73c943
Commit 7aba4f5201
("clk: ti: dflt: fix enable_reg validity check")
fixed a validation check by using an IS_ERR() macro within the
existing unlikely expression, but IS_ERR() macro already has an
unlikely inside it, so get rid of the redundant unlikely macro
from the validation check.
Reported-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
317 lines
9.8 KiB
C
317 lines
9.8 KiB
C
/*
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* Default clock type
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*
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* Copyright (C) 2005-2008, 2015 Texas Instruments, Inc.
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* Copyright (C) 2004-2010 Nokia Corporation
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*
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* Contacts:
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* Richard Woodruff <r-woodruff2@ti.com>
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* Paul Walmsley
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* Tero Kristo <t-kristo@ti.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/clk-provider.h>
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#include <linux/io.h>
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#include <linux/clk/ti.h>
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#include <linux/delay.h>
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#include "clock.h"
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/*
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* MAX_MODULE_ENABLE_WAIT: maximum of number of microseconds to wait
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* for a module to indicate that it is no longer in idle
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*/
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#define MAX_MODULE_ENABLE_WAIT 100000
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/*
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* CM module register offsets, used for calculating the companion
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* register addresses.
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*/
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#define CM_FCLKEN 0x0000
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#define CM_ICLKEN 0x0010
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/**
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* _wait_idlest_generic - wait for a module to leave the idle state
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* @clk: module clock to wait for (needed for register offsets)
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* @reg: virtual address of module IDLEST register
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* @mask: value to mask against to determine if the module is active
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* @idlest: idle state indicator (0 or 1) for the clock
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* @name: name of the clock (for printk)
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*
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* Wait for a module to leave idle, where its idle-status register is
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* not inside the CM module. Returns 1 if the module left idle
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* promptly, or 0 if the module did not leave idle before the timeout
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* elapsed. XXX Deprecated - should be moved into drivers for the
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* individual IP block that the IDLEST register exists in.
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*/
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static int _wait_idlest_generic(struct clk_hw_omap *clk, void __iomem *reg,
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u32 mask, u8 idlest, const char *name)
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{
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int i = 0, ena = 0;
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ena = (idlest) ? 0 : mask;
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/* Wait until module enters enabled state */
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for (i = 0; i < MAX_MODULE_ENABLE_WAIT; i++) {
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if ((ti_clk_ll_ops->clk_readl(reg) & mask) == ena)
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break;
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udelay(1);
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}
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if (i < MAX_MODULE_ENABLE_WAIT)
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pr_debug("omap clock: module associated with clock %s ready after %d loops\n",
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name, i);
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else
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pr_err("omap clock: module associated with clock %s didn't enable in %d tries\n",
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name, MAX_MODULE_ENABLE_WAIT);
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return (i < MAX_MODULE_ENABLE_WAIT) ? 1 : 0;
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}
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/**
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* _omap2_module_wait_ready - wait for an OMAP module to leave IDLE
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* @clk: struct clk * belonging to the module
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*
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* If the necessary clocks for the OMAP hardware IP block that
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* corresponds to clock @clk are enabled, then wait for the module to
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* indicate readiness (i.e., to leave IDLE). This code does not
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* belong in the clock code and will be moved in the medium term to
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* module-dependent code. No return value.
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*/
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static void _omap2_module_wait_ready(struct clk_hw_omap *clk)
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{
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void __iomem *companion_reg, *idlest_reg;
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u8 other_bit, idlest_bit, idlest_val, idlest_reg_id;
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s16 prcm_mod;
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int r;
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/* Not all modules have multiple clocks that their IDLEST depends on */
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if (clk->ops->find_companion) {
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clk->ops->find_companion(clk, &companion_reg, &other_bit);
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if (!(ti_clk_ll_ops->clk_readl(companion_reg) &
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(1 << other_bit)))
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return;
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}
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clk->ops->find_idlest(clk, &idlest_reg, &idlest_bit, &idlest_val);
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r = ti_clk_ll_ops->cm_split_idlest_reg(idlest_reg, &prcm_mod,
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&idlest_reg_id);
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if (r) {
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/* IDLEST register not in the CM module */
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_wait_idlest_generic(clk, idlest_reg, (1 << idlest_bit),
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idlest_val, clk_hw_get_name(&clk->hw));
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} else {
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ti_clk_ll_ops->cm_wait_module_ready(0, prcm_mod, idlest_reg_id,
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idlest_bit);
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}
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}
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/**
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* omap2_clk_dflt_find_companion - find companion clock to @clk
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* @clk: struct clk * to find the companion clock of
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* @other_reg: void __iomem ** to return the companion clock CM_*CLKEN va in
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* @other_bit: u8 ** to return the companion clock bit shift in
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*
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* Note: We don't need special code here for INVERT_ENABLE for the
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* time being since INVERT_ENABLE only applies to clocks enabled by
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* CM_CLKEN_PLL
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*
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* Convert CM_ICLKEN* <-> CM_FCLKEN*. This conversion assumes it's
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* just a matter of XORing the bits.
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*
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* Some clocks don't have companion clocks. For example, modules with
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* only an interface clock (such as MAILBOXES) don't have a companion
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* clock. Right now, this code relies on the hardware exporting a bit
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* in the correct companion register that indicates that the
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* nonexistent 'companion clock' is active. Future patches will
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* associate this type of code with per-module data structures to
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* avoid this issue, and remove the casts. No return value.
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*/
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void omap2_clk_dflt_find_companion(struct clk_hw_omap *clk,
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void __iomem **other_reg, u8 *other_bit)
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{
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u32 r;
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/*
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* Convert CM_ICLKEN* <-> CM_FCLKEN*. This conversion assumes
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* it's just a matter of XORing the bits.
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*/
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r = ((__force u32)clk->enable_reg ^ (CM_FCLKEN ^ CM_ICLKEN));
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*other_reg = (__force void __iomem *)r;
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*other_bit = clk->enable_bit;
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}
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/**
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* omap2_clk_dflt_find_idlest - find CM_IDLEST reg va, bit shift for @clk
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* @clk: struct clk * to find IDLEST info for
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* @idlest_reg: void __iomem ** to return the CM_IDLEST va in
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* @idlest_bit: u8 * to return the CM_IDLEST bit shift in
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* @idlest_val: u8 * to return the idle status indicator
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*
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* Return the CM_IDLEST register address and bit shift corresponding
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* to the module that "owns" this clock. This default code assumes
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* that the CM_IDLEST bit shift is the CM_*CLKEN bit shift, and that
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* the IDLEST register address ID corresponds to the CM_*CLKEN
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* register address ID (e.g., that CM_FCLKEN2 corresponds to
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* CM_IDLEST2). This is not true for all modules. No return value.
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*/
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void omap2_clk_dflt_find_idlest(struct clk_hw_omap *clk,
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void __iomem **idlest_reg, u8 *idlest_bit,
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u8 *idlest_val)
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{
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u32 r;
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r = (((__force u32)clk->enable_reg & ~0xf0) | 0x20);
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*idlest_reg = (__force void __iomem *)r;
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*idlest_bit = clk->enable_bit;
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/*
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* 24xx uses 0 to indicate not ready, and 1 to indicate ready.
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* 34xx reverses this, just to keep us on our toes
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* AM35xx uses both, depending on the module.
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*/
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*idlest_val = ti_clk_get_features()->cm_idlest_val;
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}
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/**
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* omap2_dflt_clk_enable - enable a clock in the hardware
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* @hw: struct clk_hw * of the clock to enable
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*
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* Enable the clock @hw in the hardware. We first call into the OMAP
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* clockdomain code to "enable" the corresponding clockdomain if this
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* is the first enabled user of the clockdomain. Then program the
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* hardware to enable the clock. Then wait for the IP block that uses
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* this clock to leave idle (if applicable). Returns the error value
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* from clkdm_clk_enable() if it terminated with an error, or -EINVAL
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* if @hw has a null clock enable_reg, or zero upon success.
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*/
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int omap2_dflt_clk_enable(struct clk_hw *hw)
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{
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struct clk_hw_omap *clk;
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u32 v;
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int ret = 0;
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bool clkdm_control;
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if (ti_clk_get_features()->flags & TI_CLK_DISABLE_CLKDM_CONTROL)
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clkdm_control = false;
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else
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clkdm_control = true;
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clk = to_clk_hw_omap(hw);
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if (clkdm_control && clk->clkdm) {
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ret = ti_clk_ll_ops->clkdm_clk_enable(clk->clkdm, hw->clk);
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if (ret) {
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WARN(1,
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"%s: could not enable %s's clockdomain %s: %d\n",
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__func__, clk_hw_get_name(hw),
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clk->clkdm_name, ret);
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return ret;
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}
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}
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if (IS_ERR(clk->enable_reg)) {
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pr_err("%s: %s missing enable_reg\n", __func__,
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clk_hw_get_name(hw));
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ret = -EINVAL;
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goto err;
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}
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/* FIXME should not have INVERT_ENABLE bit here */
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v = ti_clk_ll_ops->clk_readl(clk->enable_reg);
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if (clk->flags & INVERT_ENABLE)
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v &= ~(1 << clk->enable_bit);
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else
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v |= (1 << clk->enable_bit);
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ti_clk_ll_ops->clk_writel(v, clk->enable_reg);
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v = ti_clk_ll_ops->clk_readl(clk->enable_reg); /* OCP barrier */
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if (clk->ops && clk->ops->find_idlest)
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_omap2_module_wait_ready(clk);
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return 0;
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err:
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if (clkdm_control && clk->clkdm)
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ti_clk_ll_ops->clkdm_clk_disable(clk->clkdm, hw->clk);
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return ret;
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}
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/**
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* omap2_dflt_clk_disable - disable a clock in the hardware
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* @hw: struct clk_hw * of the clock to disable
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*
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* Disable the clock @hw in the hardware, and call into the OMAP
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* clockdomain code to "disable" the corresponding clockdomain if all
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* clocks/hwmods in that clockdomain are now disabled. No return
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* value.
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*/
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void omap2_dflt_clk_disable(struct clk_hw *hw)
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{
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struct clk_hw_omap *clk;
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u32 v;
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clk = to_clk_hw_omap(hw);
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if (IS_ERR(clk->enable_reg)) {
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/*
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* 'independent' here refers to a clock which is not
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* controlled by its parent.
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*/
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pr_err("%s: independent clock %s has no enable_reg\n",
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__func__, clk_hw_get_name(hw));
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return;
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}
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v = ti_clk_ll_ops->clk_readl(clk->enable_reg);
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if (clk->flags & INVERT_ENABLE)
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v |= (1 << clk->enable_bit);
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else
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v &= ~(1 << clk->enable_bit);
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ti_clk_ll_ops->clk_writel(v, clk->enable_reg);
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/* No OCP barrier needed here since it is a disable operation */
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if (!(ti_clk_get_features()->flags & TI_CLK_DISABLE_CLKDM_CONTROL) &&
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clk->clkdm)
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ti_clk_ll_ops->clkdm_clk_disable(clk->clkdm, hw->clk);
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}
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/**
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* omap2_dflt_clk_is_enabled - is clock enabled in the hardware?
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* @hw: struct clk_hw * to check
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*
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* Return 1 if the clock represented by @hw is enabled in the
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* hardware, or 0 otherwise. Intended for use in the struct
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* clk_ops.is_enabled function pointer.
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*/
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int omap2_dflt_clk_is_enabled(struct clk_hw *hw)
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{
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struct clk_hw_omap *clk = to_clk_hw_omap(hw);
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u32 v;
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v = ti_clk_ll_ops->clk_readl(clk->enable_reg);
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if (clk->flags & INVERT_ENABLE)
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v ^= BIT(clk->enable_bit);
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v &= BIT(clk->enable_bit);
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return v ? 1 : 0;
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}
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const struct clk_hw_omap_ops clkhwops_wait = {
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.find_idlest = omap2_clk_dflt_find_idlest,
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.find_companion = omap2_clk_dflt_find_companion,
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};
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