2d791e3bf2
phylink_set_port_modes will be compiled if CONFIG_PHYLINK enabled,
dpaa2_mac_validate will be compiled if CONFIG_FSL_DPAA2_ETH enabled,
it should select CONFIG_PHYLINK when dpaa2_mac_validate call
phylink_set_port_modes
drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.o: In function `dpaa2_mac_validate':
dpaa2-mac.c:(.text+0x3a1): undefined reference to `phylink_set_port_modes'
drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.o: In function `dpaa2_mac_connect':
dpaa2-mac.c:(.text+0x91a): undefined reference to `phylink_create'
dpaa2-mac.c:(.text+0x94e): undefined reference to `phylink_of_phy_connect'
dpaa2-mac.c:(.text+0x97f): undefined reference to `phylink_destroy'
drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.o: In function `dpaa2_mac_disconnect':
dpaa2-mac.c:(.text+0xa9f): undefined reference to `phylink_disconnect_phy'
dpaa2-mac.c:(.text+0xab0): undefined reference to `phylink_destroy'
make: *** [vmlinux] Error 1
Fixes: 7194792308 ("dpaa2-eth: add MAC/PHY support through phylink")
Signed-off-by: Chenwandun <chenwandun@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
19 lines
571 B
Plaintext
19 lines
571 B
Plaintext
# SPDX-License-Identifier: GPL-2.0-only
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config FSL_DPAA2_ETH
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tristate "Freescale DPAA2 Ethernet"
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depends on FSL_MC_BUS && FSL_MC_DPIO
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select PHYLINK
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help
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This is the DPAA2 Ethernet driver supporting Freescale SoCs
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with DPAA2 (DataPath Acceleration Architecture v2).
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The driver manages network objects discovered on the Freescale
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MC bus.
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config FSL_DPAA2_PTP_CLOCK
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tristate "Freescale DPAA2 PTP Clock"
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depends on FSL_DPAA2_ETH && PTP_1588_CLOCK_QORIQ
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default y
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help
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This driver adds support for using the DPAA2 1588 timer module
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as a PTP clock.
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