039aeb9deb
- Move the arch-specific code into arch/arm64/kvm - Start the post-32bit cleanup - Cherry-pick a few non-invasive pre-NV patches x86: - Rework of TLB flushing - Rework of event injection, especially with respect to nested virtualization - Nested AMD event injection facelift, building on the rework of generic code and fixing a lot of corner cases - Nested AMD live migration support - Optimization for TSC deadline MSR writes and IPIs - Various cleanups - Asynchronous page fault cleanups (from tglx, common topic branch with tip tree) - Interrupt-based delivery of asynchronous "page ready" events (host side) - Hyper-V MSRs and hypercalls for guest debugging - VMX preemption timer fixes s390: - Cleanups Generic: - switch vCPU thread wakeup from swait to rcuwait The other architectures, and the guest side of the asynchronous page fault work, will come next week. -----BEGIN PGP SIGNATURE----- iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAl7VJcYUHHBib256aW5p QHJlZGhhdC5jb20ACgkQv/vSX3jHroPf6QgAq4wU5wdd1lTGz/i3DIhNVJNJgJlp ozLzRdMaJbdbn5RpAK6PEBd9+pt3+UlojpFB3gpJh2Nazv2OzV4yLQgXXXyyMEx1 5Hg7b4UCJYDrbkCiegNRv7f/4FWDkQ9dx++RZITIbxeskBBCEI+I7GnmZhGWzuC4 7kj4ytuKAySF2OEJu0VQF6u0CvrNYfYbQIRKBXjtOwuRK4Q6L63FGMJpYo159MBQ asg3B1jB5TcuGZ9zrjL5LkuzaP4qZZHIRs+4kZsH9I6MODHGUxKonrkablfKxyKy CFK+iaHCuEXXty5K0VmWM3nrTfvpEjVjbMc7e1QGBQ5oXsDM0pqn84syRg== =v7Wn -----END PGP SIGNATURE----- Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm Pull kvm updates from Paolo Bonzini: "ARM: - Move the arch-specific code into arch/arm64/kvm - Start the post-32bit cleanup - Cherry-pick a few non-invasive pre-NV patches x86: - Rework of TLB flushing - Rework of event injection, especially with respect to nested virtualization - Nested AMD event injection facelift, building on the rework of generic code and fixing a lot of corner cases - Nested AMD live migration support - Optimization for TSC deadline MSR writes and IPIs - Various cleanups - Asynchronous page fault cleanups (from tglx, common topic branch with tip tree) - Interrupt-based delivery of asynchronous "page ready" events (host side) - Hyper-V MSRs and hypercalls for guest debugging - VMX preemption timer fixes s390: - Cleanups Generic: - switch vCPU thread wakeup from swait to rcuwait The other architectures, and the guest side of the asynchronous page fault work, will come next week" * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (256 commits) KVM: selftests: fix rdtsc() for vmx_tsc_adjust_test KVM: check userspace_addr for all memslots KVM: selftests: update hyperv_cpuid with SynDBG tests x86/kvm/hyper-v: Add support for synthetic debugger via hypercalls x86/kvm/hyper-v: enable hypercalls regardless of hypercall page x86/kvm/hyper-v: Add support for synthetic debugger interface x86/hyper-v: Add synthetic debugger definitions KVM: selftests: VMX preemption timer migration test KVM: nVMX: Fix VMX preemption timer migration x86/kvm/hyper-v: Explicitly align hcall param for kvm_hyperv_exit KVM: x86/pmu: Support full width counting KVM: x86/pmu: Tweak kvm_pmu_get_msr to pass 'struct msr_data' in KVM: x86: announce KVM_FEATURE_ASYNC_PF_INT KVM: x86: acknowledgment mechanism for async pf page ready notifications KVM: x86: interrupt based APF 'page ready' event delivery KVM: introduce kvm_read_guest_offset_cached() KVM: rename kvm_arch_can_inject_async_page_present() to kvm_arch_can_dequeue_async_page_present() KVM: x86: extend struct kvm_vcpu_pv_apf_data with token info Revert "KVM: async_pf: Fix #DF due to inject "Page not Present" and "Page Ready" exceptions simultaneously" KVM: VMX: Replace zero-length array with flexible-array ...
92 lines
3.2 KiB
C
92 lines
3.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
|
|
/*
|
|
* Copyright (C) 2015 - ARM Ltd
|
|
* Author: Marc Zyngier <marc.zyngier@arm.com>
|
|
*/
|
|
|
|
#ifndef __ARM64_KVM_HYP_H__
|
|
#define __ARM64_KVM_HYP_H__
|
|
|
|
#include <linux/compiler.h>
|
|
#include <linux/kvm_host.h>
|
|
#include <asm/alternative.h>
|
|
#include <asm/sysreg.h>
|
|
|
|
#define __hyp_text __section(.hyp.text) notrace __noscs
|
|
|
|
#define read_sysreg_elx(r,nvh,vh) \
|
|
({ \
|
|
u64 reg; \
|
|
asm volatile(ALTERNATIVE(__mrs_s("%0", r##nvh), \
|
|
__mrs_s("%0", r##vh), \
|
|
ARM64_HAS_VIRT_HOST_EXTN) \
|
|
: "=r" (reg)); \
|
|
reg; \
|
|
})
|
|
|
|
#define write_sysreg_elx(v,r,nvh,vh) \
|
|
do { \
|
|
u64 __val = (u64)(v); \
|
|
asm volatile(ALTERNATIVE(__msr_s(r##nvh, "%x0"), \
|
|
__msr_s(r##vh, "%x0"), \
|
|
ARM64_HAS_VIRT_HOST_EXTN) \
|
|
: : "rZ" (__val)); \
|
|
} while (0)
|
|
|
|
/*
|
|
* Unified accessors for registers that have a different encoding
|
|
* between VHE and non-VHE. They must be specified without their "ELx"
|
|
* encoding, but with the SYS_ prefix, as defined in asm/sysreg.h.
|
|
*/
|
|
|
|
#define read_sysreg_el0(r) read_sysreg_elx(r, _EL0, _EL02)
|
|
#define write_sysreg_el0(v,r) write_sysreg_elx(v, r, _EL0, _EL02)
|
|
#define read_sysreg_el1(r) read_sysreg_elx(r, _EL1, _EL12)
|
|
#define write_sysreg_el1(v,r) write_sysreg_elx(v, r, _EL1, _EL12)
|
|
#define read_sysreg_el2(r) read_sysreg_elx(r, _EL2, _EL1)
|
|
#define write_sysreg_el2(v,r) write_sysreg_elx(v, r, _EL2, _EL1)
|
|
|
|
/*
|
|
* Without an __arch_swab32(), we fall back to ___constant_swab32(), but the
|
|
* static inline can allow the compiler to out-of-line this. KVM always wants
|
|
* the macro version as its always inlined.
|
|
*/
|
|
#define __kvm_swab32(x) ___constant_swab32(x)
|
|
|
|
int __vgic_v2_perform_cpuif_access(struct kvm_vcpu *vcpu);
|
|
|
|
void __vgic_v3_save_state(struct vgic_v3_cpu_if *cpu_if);
|
|
void __vgic_v3_restore_state(struct vgic_v3_cpu_if *cpu_if);
|
|
void __vgic_v3_activate_traps(struct vgic_v3_cpu_if *cpu_if);
|
|
void __vgic_v3_deactivate_traps(struct vgic_v3_cpu_if *cpu_if);
|
|
void __vgic_v3_save_aprs(struct vgic_v3_cpu_if *cpu_if);
|
|
void __vgic_v3_restore_aprs(struct vgic_v3_cpu_if *cpu_if);
|
|
int __vgic_v3_perform_cpuif_access(struct kvm_vcpu *vcpu);
|
|
|
|
void __timer_enable_traps(struct kvm_vcpu *vcpu);
|
|
void __timer_disable_traps(struct kvm_vcpu *vcpu);
|
|
|
|
void __sysreg_save_state_nvhe(struct kvm_cpu_context *ctxt);
|
|
void __sysreg_restore_state_nvhe(struct kvm_cpu_context *ctxt);
|
|
void sysreg_save_host_state_vhe(struct kvm_cpu_context *ctxt);
|
|
void sysreg_restore_host_state_vhe(struct kvm_cpu_context *ctxt);
|
|
void sysreg_save_guest_state_vhe(struct kvm_cpu_context *ctxt);
|
|
void sysreg_restore_guest_state_vhe(struct kvm_cpu_context *ctxt);
|
|
void __sysreg32_save_state(struct kvm_vcpu *vcpu);
|
|
void __sysreg32_restore_state(struct kvm_vcpu *vcpu);
|
|
|
|
void __debug_switch_to_guest(struct kvm_vcpu *vcpu);
|
|
void __debug_switch_to_host(struct kvm_vcpu *vcpu);
|
|
|
|
void __fpsimd_save_state(struct user_fpsimd_state *fp_regs);
|
|
void __fpsimd_restore_state(struct user_fpsimd_state *fp_regs);
|
|
|
|
void activate_traps_vhe_load(struct kvm_vcpu *vcpu);
|
|
void deactivate_traps_vhe_put(void);
|
|
|
|
u64 __guest_enter(struct kvm_vcpu *vcpu, struct kvm_cpu_context *host_ctxt);
|
|
void __noreturn __hyp_do_panic(unsigned long, ...);
|
|
|
|
#endif /* __ARM64_KVM_HYP_H__ */
|
|
|