61 lines
		
	
	
		
			2.7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			61 lines
		
	
	
		
			2.7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  *  Galileo/Marvell GT641xx IRQ definitions.
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|  *
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|  *  Copyright (C) 2007  Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
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|  *
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|  *  This program is free software; you can redistribute it and/or modify
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|  *  it under the terms of the GNU General Public License as published by
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|  *  the Free Software Foundation; either version 2 of the License, or
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|  *  (at your option) any later version.
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|  *
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|  *  This program is distributed in the hope that it will be useful,
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|  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
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|  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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|  *  GNU General Public License for more details.
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|  *
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|  *  You should have received a copy of the GNU General Public License
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|  *  along with this program; if not, write to the Free Software
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|  *  Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA
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|  */
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| #ifndef _ASM_IRQ_GT641XX_H
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| #define _ASM_IRQ_GT641XX_H
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| 
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| #ifndef GT641XX_IRQ_BASE
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| #define GT641XX_IRQ_BASE		8
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| #endif
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| 
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| #define GT641XX_MEMORY_OUT_OF_RANGE_IRQ		(GT641XX_IRQ_BASE + 1)
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| #define GT641XX_DMA_OUT_OF_RANGE_IRQ		(GT641XX_IRQ_BASE + 2)
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| #define GT641XX_CPU_ACCESS_OUT_OF_RANGE_IRQ	(GT641XX_IRQ_BASE + 3)
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| #define GT641XX_DMA0_IRQ			(GT641XX_IRQ_BASE + 4)
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| #define GT641XX_DMA1_IRQ			(GT641XX_IRQ_BASE + 5)
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| #define GT641XX_DMA2_IRQ			(GT641XX_IRQ_BASE + 6)
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| #define GT641XX_DMA3_IRQ			(GT641XX_IRQ_BASE + 7)
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| #define GT641XX_TIMER0_IRQ			(GT641XX_IRQ_BASE + 8)
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| #define GT641XX_TIMER1_IRQ			(GT641XX_IRQ_BASE + 9)
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| #define GT641XX_TIMER2_IRQ			(GT641XX_IRQ_BASE + 10)
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| #define GT641XX_TIMER3_IRQ			(GT641XX_IRQ_BASE + 11)
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| #define GT641XX_PCI_0_MASTER_READ_ERROR_IRQ	(GT641XX_IRQ_BASE + 12)
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| #define GT641XX_PCI_0_SLAVE_WRITE_ERROR_IRQ	(GT641XX_IRQ_BASE + 13)
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| #define GT641XX_PCI_0_MASTER_WRITE_ERROR_IRQ	(GT641XX_IRQ_BASE + 14)
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| #define GT641XX_PCI_0_SLAVE_READ_ERROR_IRQ	(GT641XX_IRQ_BASE + 15)
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| #define GT641XX_PCI_0_ADDRESS_ERROR_IRQ		(GT641XX_IRQ_BASE + 16)
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| #define GT641XX_MEMORY_ERROR_IRQ		(GT641XX_IRQ_BASE + 17)
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| #define GT641XX_PCI_0_MASTER_ABORT_IRQ		(GT641XX_IRQ_BASE + 18)
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| #define GT641XX_PCI_0_TARGET_ABORT_IRQ		(GT641XX_IRQ_BASE + 19)
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| #define GT641XX_PCI_0_RETRY_TIMEOUT_IRQ		(GT641XX_IRQ_BASE + 20)
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| #define GT641XX_CPU_INT0_IRQ			(GT641XX_IRQ_BASE + 21)
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| #define GT641XX_CPU_INT1_IRQ			(GT641XX_IRQ_BASE + 22)
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| #define GT641XX_CPU_INT2_IRQ			(GT641XX_IRQ_BASE + 23)
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| #define GT641XX_CPU_INT3_IRQ			(GT641XX_IRQ_BASE + 24)
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| #define GT641XX_CPU_INT4_IRQ			(GT641XX_IRQ_BASE + 25)
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| #define GT641XX_PCI_INT0_IRQ			(GT641XX_IRQ_BASE + 26)
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| #define GT641XX_PCI_INT1_IRQ			(GT641XX_IRQ_BASE + 27)
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| #define GT641XX_PCI_INT2_IRQ			(GT641XX_IRQ_BASE + 28)
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| #define GT641XX_PCI_INT3_IRQ			(GT641XX_IRQ_BASE + 29)
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| 
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| extern void gt641xx_irq_dispatch(void);
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| extern void gt641xx_irq_init(void);
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| 
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| #endif /* _ASM_IRQ_GT641XX_H */
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