forked from Minki/linux
714d8e7e27
The main change here is a significant head.S rework that allows us to boot on machines with physical memory at a really high address without having to increase our mapped VA range. Other changes include: - AES performance boost for Cortex-A57 - AArch32 (compat) userspace with 64k pages - Cortex-A53 erratum workaround for #845719 - defconfig updates (new platforms, PCI, ...) -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQEcBAABCgAGBQJVLnQpAAoJELescNyEwWM03RIH/iwcDc0MBZgkwfD5cnY+29p4 m89lMDo3SyGQT4NynHSw7P3R7c3zULmI+9hmJMw/yfjjjL6m7X+vVAF3xj1Am4Al OzCqYLHyFnlRktzJ6dWeF1Ese7tWqPpxn+OCXgYNpz/r5MfF/HhlyX/qNzAQPKrw ZpDvnt44DgUfweqjTbwQUg2wkyCRjmz57MQYxDcmJStdpHIu24jWOvDIo3OJGjyS L49I9DU6DGUhkISZmmBE0T7vmKMD1BcgI7OIzX2WIqn521QT+GSLMhRxaHmK1s1V A8gaMTwpo0xFhTAt7sbw/5+2663WmfRdZI+FtduvORsoxX6KdDn7DH1NQixIm8s= =+F0I -----END PGP SIGNATURE----- Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 updates from Will Deacon: "Here are the core arm64 updates for 4.1. Highlights include a significant rework to head.S (allowing us to boot on machines with physical memory at a really high address), an AES performance boost on Cortex-A57 and the ability to run a 32-bit userspace with 64k pages (although this requires said userspace to be built with a recent binutils). The head.S rework spilt over into KVM, so there are some changes under arch/arm/ which have been acked by Marc Zyngier (KVM co-maintainer). In particular, the linker script changes caused us some issues in -next, so there are a few merge commits where we had to apply fixes on top of a stable branch. Other changes include: - AES performance boost for Cortex-A57 - AArch32 (compat) userspace with 64k pages - Cortex-A53 erratum workaround for #845719 - defconfig updates (new platforms, PCI, ...)" * tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (39 commits) arm64: fix midr range for Cortex-A57 erratum 832075 arm64: errata: add workaround for cortex-a53 erratum #845719 arm64: Use bool function return values of true/false not 1/0 arm64: defconfig: updates for 4.1 arm64: Extract feature parsing code from cpu_errata.c arm64: alternative: Allow immediate branch as alternative instruction arm64: insn: Add aarch64_insn_decode_immediate ARM: kvm: round HYP section to page size instead of log2 upper bound ARM: kvm: assert on HYP section boundaries not actual code size arm64: head.S: ensure idmap_t0sz is visible arm64: pmu: add support for interrupt-affinity property dt: pmu: extend ARM PMU binding to allow for explicit interrupt affinity arm64: head.S: ensure visibility of page tables arm64: KVM: use ID map with increased VA range if required arm64: mm: increase VA range of identity map ARM: kvm: implement replacement for ld's LOG2CEIL() arm64: proc: remove unused cpu_get_pgd macro arm64: enforce x1|x2|x3 == 0 upon kernel entry as per boot protocol arm64: remove __calc_phys_offset arm64: merge __enable_mmu and __turn_mmu_on ...
162 lines
7.9 KiB
C
162 lines
7.9 KiB
C
/*
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* Based on arch/arm/kernel/asm-offsets.c
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*
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* Copyright (C) 1995-2003 Russell King
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* 2001-2002 Keith Owens
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* Copyright (C) 2012 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/sched.h>
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#include <linux/mm.h>
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#include <linux/dma-mapping.h>
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#include <linux/kvm_host.h>
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#include <asm/thread_info.h>
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#include <asm/memory.h>
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#include <asm/smp_plat.h>
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#include <asm/suspend.h>
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#include <asm/vdso_datapage.h>
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#include <linux/kbuild.h>
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int main(void)
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{
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DEFINE(TSK_ACTIVE_MM, offsetof(struct task_struct, active_mm));
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BLANK();
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DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
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DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count));
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DEFINE(TI_ADDR_LIMIT, offsetof(struct thread_info, addr_limit));
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DEFINE(TI_TASK, offsetof(struct thread_info, task));
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DEFINE(TI_CPU, offsetof(struct thread_info, cpu));
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BLANK();
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DEFINE(THREAD_CPU_CONTEXT, offsetof(struct task_struct, thread.cpu_context));
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BLANK();
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DEFINE(S_X0, offsetof(struct pt_regs, regs[0]));
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DEFINE(S_X1, offsetof(struct pt_regs, regs[1]));
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DEFINE(S_X2, offsetof(struct pt_regs, regs[2]));
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DEFINE(S_X3, offsetof(struct pt_regs, regs[3]));
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DEFINE(S_X4, offsetof(struct pt_regs, regs[4]));
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DEFINE(S_X5, offsetof(struct pt_regs, regs[5]));
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DEFINE(S_X6, offsetof(struct pt_regs, regs[6]));
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DEFINE(S_X7, offsetof(struct pt_regs, regs[7]));
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DEFINE(S_LR, offsetof(struct pt_regs, regs[30]));
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DEFINE(S_SP, offsetof(struct pt_regs, sp));
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#ifdef CONFIG_COMPAT
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DEFINE(S_COMPAT_SP, offsetof(struct pt_regs, compat_sp));
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#endif
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DEFINE(S_PSTATE, offsetof(struct pt_regs, pstate));
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DEFINE(S_PC, offsetof(struct pt_regs, pc));
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DEFINE(S_ORIG_X0, offsetof(struct pt_regs, orig_x0));
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DEFINE(S_SYSCALLNO, offsetof(struct pt_regs, syscallno));
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DEFINE(S_FRAME_SIZE, sizeof(struct pt_regs));
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BLANK();
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DEFINE(MM_CONTEXT_ID, offsetof(struct mm_struct, context.id));
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BLANK();
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DEFINE(VMA_VM_MM, offsetof(struct vm_area_struct, vm_mm));
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DEFINE(VMA_VM_FLAGS, offsetof(struct vm_area_struct, vm_flags));
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BLANK();
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DEFINE(VM_EXEC, VM_EXEC);
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BLANK();
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DEFINE(PAGE_SZ, PAGE_SIZE);
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BLANK();
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DEFINE(DMA_BIDIRECTIONAL, DMA_BIDIRECTIONAL);
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DEFINE(DMA_TO_DEVICE, DMA_TO_DEVICE);
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DEFINE(DMA_FROM_DEVICE, DMA_FROM_DEVICE);
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BLANK();
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DEFINE(CLOCK_REALTIME, CLOCK_REALTIME);
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DEFINE(CLOCK_MONOTONIC, CLOCK_MONOTONIC);
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DEFINE(CLOCK_REALTIME_RES, MONOTONIC_RES_NSEC);
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DEFINE(CLOCK_REALTIME_COARSE, CLOCK_REALTIME_COARSE);
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DEFINE(CLOCK_MONOTONIC_COARSE,CLOCK_MONOTONIC_COARSE);
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DEFINE(CLOCK_COARSE_RES, LOW_RES_NSEC);
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DEFINE(NSEC_PER_SEC, NSEC_PER_SEC);
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BLANK();
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DEFINE(VDSO_CS_CYCLE_LAST, offsetof(struct vdso_data, cs_cycle_last));
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DEFINE(VDSO_XTIME_CLK_SEC, offsetof(struct vdso_data, xtime_clock_sec));
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DEFINE(VDSO_XTIME_CLK_NSEC, offsetof(struct vdso_data, xtime_clock_nsec));
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DEFINE(VDSO_XTIME_CRS_SEC, offsetof(struct vdso_data, xtime_coarse_sec));
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DEFINE(VDSO_XTIME_CRS_NSEC, offsetof(struct vdso_data, xtime_coarse_nsec));
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DEFINE(VDSO_WTM_CLK_SEC, offsetof(struct vdso_data, wtm_clock_sec));
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DEFINE(VDSO_WTM_CLK_NSEC, offsetof(struct vdso_data, wtm_clock_nsec));
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DEFINE(VDSO_TB_SEQ_COUNT, offsetof(struct vdso_data, tb_seq_count));
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DEFINE(VDSO_CS_MULT, offsetof(struct vdso_data, cs_mult));
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DEFINE(VDSO_CS_SHIFT, offsetof(struct vdso_data, cs_shift));
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DEFINE(VDSO_TZ_MINWEST, offsetof(struct vdso_data, tz_minuteswest));
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DEFINE(VDSO_TZ_DSTTIME, offsetof(struct vdso_data, tz_dsttime));
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DEFINE(VDSO_USE_SYSCALL, offsetof(struct vdso_data, use_syscall));
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BLANK();
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DEFINE(TVAL_TV_SEC, offsetof(struct timeval, tv_sec));
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DEFINE(TVAL_TV_USEC, offsetof(struct timeval, tv_usec));
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DEFINE(TSPEC_TV_SEC, offsetof(struct timespec, tv_sec));
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DEFINE(TSPEC_TV_NSEC, offsetof(struct timespec, tv_nsec));
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BLANK();
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DEFINE(TZ_MINWEST, offsetof(struct timezone, tz_minuteswest));
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DEFINE(TZ_DSTTIME, offsetof(struct timezone, tz_dsttime));
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BLANK();
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#ifdef CONFIG_KVM_ARM_HOST
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DEFINE(VCPU_CONTEXT, offsetof(struct kvm_vcpu, arch.ctxt));
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DEFINE(CPU_GP_REGS, offsetof(struct kvm_cpu_context, gp_regs));
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DEFINE(CPU_USER_PT_REGS, offsetof(struct kvm_regs, regs));
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DEFINE(CPU_FP_REGS, offsetof(struct kvm_regs, fp_regs));
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DEFINE(CPU_SP_EL1, offsetof(struct kvm_regs, sp_el1));
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DEFINE(CPU_ELR_EL1, offsetof(struct kvm_regs, elr_el1));
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DEFINE(CPU_SPSR, offsetof(struct kvm_regs, spsr));
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DEFINE(CPU_SYSREGS, offsetof(struct kvm_cpu_context, sys_regs));
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DEFINE(VCPU_ESR_EL2, offsetof(struct kvm_vcpu, arch.fault.esr_el2));
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DEFINE(VCPU_FAR_EL2, offsetof(struct kvm_vcpu, arch.fault.far_el2));
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DEFINE(VCPU_HPFAR_EL2, offsetof(struct kvm_vcpu, arch.fault.hpfar_el2));
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DEFINE(VCPU_DEBUG_FLAGS, offsetof(struct kvm_vcpu, arch.debug_flags));
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DEFINE(VCPU_HCR_EL2, offsetof(struct kvm_vcpu, arch.hcr_el2));
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DEFINE(VCPU_IRQ_LINES, offsetof(struct kvm_vcpu, arch.irq_lines));
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DEFINE(VCPU_HOST_CONTEXT, offsetof(struct kvm_vcpu, arch.host_cpu_context));
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DEFINE(VCPU_TIMER_CNTV_CTL, offsetof(struct kvm_vcpu, arch.timer_cpu.cntv_ctl));
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DEFINE(VCPU_TIMER_CNTV_CVAL, offsetof(struct kvm_vcpu, arch.timer_cpu.cntv_cval));
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DEFINE(KVM_TIMER_CNTVOFF, offsetof(struct kvm, arch.timer.cntvoff));
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DEFINE(KVM_TIMER_ENABLED, offsetof(struct kvm, arch.timer.enabled));
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DEFINE(VCPU_KVM, offsetof(struct kvm_vcpu, kvm));
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DEFINE(VCPU_VGIC_CPU, offsetof(struct kvm_vcpu, arch.vgic_cpu));
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DEFINE(VGIC_SAVE_FN, offsetof(struct vgic_sr_vectors, save_vgic));
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DEFINE(VGIC_RESTORE_FN, offsetof(struct vgic_sr_vectors, restore_vgic));
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DEFINE(VGIC_SR_VECTOR_SZ, sizeof(struct vgic_sr_vectors));
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DEFINE(VGIC_V2_CPU_HCR, offsetof(struct vgic_cpu, vgic_v2.vgic_hcr));
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DEFINE(VGIC_V2_CPU_VMCR, offsetof(struct vgic_cpu, vgic_v2.vgic_vmcr));
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DEFINE(VGIC_V2_CPU_MISR, offsetof(struct vgic_cpu, vgic_v2.vgic_misr));
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DEFINE(VGIC_V2_CPU_EISR, offsetof(struct vgic_cpu, vgic_v2.vgic_eisr));
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DEFINE(VGIC_V2_CPU_ELRSR, offsetof(struct vgic_cpu, vgic_v2.vgic_elrsr));
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DEFINE(VGIC_V2_CPU_APR, offsetof(struct vgic_cpu, vgic_v2.vgic_apr));
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DEFINE(VGIC_V2_CPU_LR, offsetof(struct vgic_cpu, vgic_v2.vgic_lr));
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DEFINE(VGIC_V3_CPU_SRE, offsetof(struct vgic_cpu, vgic_v3.vgic_sre));
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DEFINE(VGIC_V3_CPU_HCR, offsetof(struct vgic_cpu, vgic_v3.vgic_hcr));
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DEFINE(VGIC_V3_CPU_VMCR, offsetof(struct vgic_cpu, vgic_v3.vgic_vmcr));
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DEFINE(VGIC_V3_CPU_MISR, offsetof(struct vgic_cpu, vgic_v3.vgic_misr));
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DEFINE(VGIC_V3_CPU_EISR, offsetof(struct vgic_cpu, vgic_v3.vgic_eisr));
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DEFINE(VGIC_V3_CPU_ELRSR, offsetof(struct vgic_cpu, vgic_v3.vgic_elrsr));
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DEFINE(VGIC_V3_CPU_AP0R, offsetof(struct vgic_cpu, vgic_v3.vgic_ap0r));
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DEFINE(VGIC_V3_CPU_AP1R, offsetof(struct vgic_cpu, vgic_v3.vgic_ap1r));
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DEFINE(VGIC_V3_CPU_LR, offsetof(struct vgic_cpu, vgic_v3.vgic_lr));
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DEFINE(VGIC_CPU_NR_LR, offsetof(struct vgic_cpu, nr_lr));
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DEFINE(KVM_VTTBR, offsetof(struct kvm, arch.vttbr));
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DEFINE(KVM_VGIC_VCTRL, offsetof(struct kvm, arch.vgic.vctrl_base));
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#endif
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#ifdef CONFIG_CPU_PM
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DEFINE(CPU_SUSPEND_SZ, sizeof(struct cpu_suspend_ctx));
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DEFINE(CPU_CTX_SP, offsetof(struct cpu_suspend_ctx, sp));
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DEFINE(MPIDR_HASH_MASK, offsetof(struct mpidr_hash, mask));
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DEFINE(MPIDR_HASH_SHIFTS, offsetof(struct mpidr_hash, shift_aff));
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DEFINE(SLEEP_SAVE_SP_SZ, sizeof(struct sleep_save_sp));
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DEFINE(SLEEP_SAVE_SP_PHYS, offsetof(struct sleep_save_sp, save_ptr_stash_phys));
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DEFINE(SLEEP_SAVE_SP_VIRT, offsetof(struct sleep_save_sp, save_ptr_stash));
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#endif
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return 0;
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}
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