Stephane Eranian 5c95c68949 perf/x86/rapl: Refactor to share the RAPL code between Intel and AMD CPUs ... This patch modifies the rapl_model struct to include architecture specific knowledge in this previously Intel specific structure, and in particular it adds the MSR for POWER_UNIT and the rapl_msrs array. No functional changes. Signed-off-by: Stephane Eranian <eranian@google.com> Signed-off-by: Ingo Molnar <mingo@kernel.org> Link: https://lore.kernel.org/r/20200527224659.206129-3-eranian@google.com		2020-05-28 07:58:55 +02:00
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amd	Merge branch 'x86/cpu' into perf/core, to resolve conflict	2020-03-25 15:20:44 +01:00
intel	perf/x86/rapl: Move RAPL support to common x86 code	2020-05-28 07:58:55 +02:00
zhaoxin	x86/perf: Add hardware performance events support for Zhaoxin CPU.	2020-04-30 20:14:35 +02:00
core.c	x86/perf: Add hardware performance events support for Zhaoxin CPU.	2020-04-30 20:14:35 +02:00
Kconfig	perf/x86/rapl: Move RAPL support to common x86 code	2020-05-28 07:58:55 +02:00
Makefile	perf/x86/rapl: Move RAPL support to common x86 code	2020-05-28 07:58:55 +02:00
msr.c	perf/x86/msr: Add Tremont support	2020-02-11 13:17:50 +01:00
perf_event.h	x86/perf: Add hardware performance events support for Zhaoxin CPU.	2020-04-30 20:14:35 +02:00
probe.c	perf/x86: Add MSR probe interface	2019-06-24 19:28:31 +02:00
probe.h	perf/x86: Add MSR probe interface	2019-06-24 19:28:31 +02:00
rapl.c	perf/x86/rapl: Refactor to share the RAPL code between Intel and AMD CPUs	2020-05-28 07:58:55 +02:00