linux/drivers/gpu
Chris Wilson 5b30694b47 drm/i915: Align GGTT sizes to a fence tile row
Ensure the view occupies the full tile row so that reads/writes into the
VMA do not escape (via fenced detiling) into neighbouring objects - we
will pad the object with scratch pages to satisfy the fence. This
applies the lazy-tiling we employed on gen2/3 to gen4+.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20170109161613.11881-2-chris@chris-wilson.co.uk
2017-01-10 08:12:20 +00:00
..
drm drm/i915: Align GGTT sizes to a fence tile row 2017-01-10 08:12:20 +00:00
host1x gpu: host1x: Add locking to syncpt 2016-11-11 15:33:13 +01:00
ipu-v3 imx-drm plane update cleanup, YUV formats 2016-11-11 09:31:27 +10:00
vga vgaarb: use valid dev pointer in vgaarb_info() 2016-11-22 16:40:35 +01:00
Makefile