forked from Minki/linux
9fd2cf4d6f
The nvdimm_pmem_region_create() function returns NULL on error. It does
not return error pointers.
Fixes: 04ad63f086
("cxl/region: Introduce cxl_pmem_region objects")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/Yuo65lq2WtfdGJ0X@kili
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
633 lines
15 KiB
C
633 lines
15 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/* Copyright(c) 2021 Intel Corporation. All rights reserved. */
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#include <linux/libnvdimm.h>
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#include <asm/unaligned.h>
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#include <linux/device.h>
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#include <linux/module.h>
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#include <linux/ndctl.h>
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#include <linux/async.h>
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#include <linux/slab.h>
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#include <linux/nd.h>
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#include "cxlmem.h"
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#include "cxl.h"
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/*
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* Ordered workqueue for cxl nvdimm device arrival and departure
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* to coordinate bus rescans when a bridge arrives and trigger remove
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* operations when the bridge is removed.
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*/
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static struct workqueue_struct *cxl_pmem_wq;
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static __read_mostly DECLARE_BITMAP(exclusive_cmds, CXL_MEM_COMMAND_ID_MAX);
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static void clear_exclusive(void *cxlds)
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{
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clear_exclusive_cxl_commands(cxlds, exclusive_cmds);
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}
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static void unregister_nvdimm(void *nvdimm)
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{
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struct cxl_nvdimm *cxl_nvd = nvdimm_provider_data(nvdimm);
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struct cxl_nvdimm_bridge *cxl_nvb = cxl_nvd->bridge;
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struct cxl_pmem_region *cxlr_pmem;
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device_lock(&cxl_nvb->dev);
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cxlr_pmem = cxl_nvd->region;
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dev_set_drvdata(&cxl_nvd->dev, NULL);
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cxl_nvd->region = NULL;
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device_unlock(&cxl_nvb->dev);
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if (cxlr_pmem) {
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device_release_driver(&cxlr_pmem->dev);
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put_device(&cxlr_pmem->dev);
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}
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nvdimm_delete(nvdimm);
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cxl_nvd->bridge = NULL;
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}
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static int cxl_nvdimm_probe(struct device *dev)
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{
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struct cxl_nvdimm *cxl_nvd = to_cxl_nvdimm(dev);
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struct cxl_memdev *cxlmd = cxl_nvd->cxlmd;
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unsigned long flags = 0, cmd_mask = 0;
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struct cxl_dev_state *cxlds = cxlmd->cxlds;
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struct cxl_nvdimm_bridge *cxl_nvb;
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struct nvdimm *nvdimm;
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int rc;
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cxl_nvb = cxl_find_nvdimm_bridge(dev);
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if (!cxl_nvb)
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return -ENXIO;
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device_lock(&cxl_nvb->dev);
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if (!cxl_nvb->nvdimm_bus) {
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rc = -ENXIO;
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goto out;
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}
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set_exclusive_cxl_commands(cxlds, exclusive_cmds);
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rc = devm_add_action_or_reset(dev, clear_exclusive, cxlds);
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if (rc)
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goto out;
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set_bit(NDD_LABELING, &flags);
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set_bit(ND_CMD_GET_CONFIG_SIZE, &cmd_mask);
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set_bit(ND_CMD_GET_CONFIG_DATA, &cmd_mask);
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set_bit(ND_CMD_SET_CONFIG_DATA, &cmd_mask);
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nvdimm = nvdimm_create(cxl_nvb->nvdimm_bus, cxl_nvd, NULL, flags,
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cmd_mask, 0, NULL);
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if (!nvdimm) {
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rc = -ENOMEM;
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goto out;
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}
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dev_set_drvdata(dev, nvdimm);
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cxl_nvd->bridge = cxl_nvb;
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rc = devm_add_action_or_reset(dev, unregister_nvdimm, nvdimm);
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out:
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device_unlock(&cxl_nvb->dev);
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put_device(&cxl_nvb->dev);
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return rc;
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}
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static struct cxl_driver cxl_nvdimm_driver = {
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.name = "cxl_nvdimm",
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.probe = cxl_nvdimm_probe,
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.id = CXL_DEVICE_NVDIMM,
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};
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static int cxl_pmem_get_config_size(struct cxl_dev_state *cxlds,
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struct nd_cmd_get_config_size *cmd,
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unsigned int buf_len)
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{
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if (sizeof(*cmd) > buf_len)
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return -EINVAL;
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*cmd = (struct nd_cmd_get_config_size) {
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.config_size = cxlds->lsa_size,
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.max_xfer = cxlds->payload_size,
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};
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return 0;
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}
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static int cxl_pmem_get_config_data(struct cxl_dev_state *cxlds,
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struct nd_cmd_get_config_data_hdr *cmd,
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unsigned int buf_len)
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{
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struct cxl_mbox_get_lsa get_lsa;
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int rc;
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if (sizeof(*cmd) > buf_len)
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return -EINVAL;
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if (struct_size(cmd, out_buf, cmd->in_length) > buf_len)
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return -EINVAL;
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get_lsa = (struct cxl_mbox_get_lsa) {
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.offset = cpu_to_le32(cmd->in_offset),
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.length = cpu_to_le32(cmd->in_length),
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};
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rc = cxl_mbox_send_cmd(cxlds, CXL_MBOX_OP_GET_LSA, &get_lsa,
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sizeof(get_lsa), cmd->out_buf, cmd->in_length);
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cmd->status = 0;
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return rc;
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}
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static int cxl_pmem_set_config_data(struct cxl_dev_state *cxlds,
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struct nd_cmd_set_config_hdr *cmd,
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unsigned int buf_len)
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{
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struct cxl_mbox_set_lsa *set_lsa;
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int rc;
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if (sizeof(*cmd) > buf_len)
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return -EINVAL;
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/* 4-byte status follows the input data in the payload */
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if (struct_size(cmd, in_buf, cmd->in_length) + 4 > buf_len)
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return -EINVAL;
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set_lsa =
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kvzalloc(struct_size(set_lsa, data, cmd->in_length), GFP_KERNEL);
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if (!set_lsa)
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return -ENOMEM;
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*set_lsa = (struct cxl_mbox_set_lsa) {
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.offset = cpu_to_le32(cmd->in_offset),
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};
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memcpy(set_lsa->data, cmd->in_buf, cmd->in_length);
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rc = cxl_mbox_send_cmd(cxlds, CXL_MBOX_OP_SET_LSA, set_lsa,
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struct_size(set_lsa, data, cmd->in_length),
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NULL, 0);
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/*
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* Set "firmware" status (4-packed bytes at the end of the input
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* payload.
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*/
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put_unaligned(0, (u32 *) &cmd->in_buf[cmd->in_length]);
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kvfree(set_lsa);
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return rc;
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}
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static int cxl_pmem_nvdimm_ctl(struct nvdimm *nvdimm, unsigned int cmd,
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void *buf, unsigned int buf_len)
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{
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struct cxl_nvdimm *cxl_nvd = nvdimm_provider_data(nvdimm);
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unsigned long cmd_mask = nvdimm_cmd_mask(nvdimm);
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struct cxl_memdev *cxlmd = cxl_nvd->cxlmd;
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struct cxl_dev_state *cxlds = cxlmd->cxlds;
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if (!test_bit(cmd, &cmd_mask))
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return -ENOTTY;
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switch (cmd) {
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case ND_CMD_GET_CONFIG_SIZE:
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return cxl_pmem_get_config_size(cxlds, buf, buf_len);
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case ND_CMD_GET_CONFIG_DATA:
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return cxl_pmem_get_config_data(cxlds, buf, buf_len);
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case ND_CMD_SET_CONFIG_DATA:
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return cxl_pmem_set_config_data(cxlds, buf, buf_len);
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default:
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return -ENOTTY;
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}
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}
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static int cxl_pmem_ctl(struct nvdimm_bus_descriptor *nd_desc,
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struct nvdimm *nvdimm, unsigned int cmd, void *buf,
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unsigned int buf_len, int *cmd_rc)
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{
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/*
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* No firmware response to translate, let the transport error
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* code take precedence.
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*/
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*cmd_rc = 0;
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if (!nvdimm)
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return -ENOTTY;
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return cxl_pmem_nvdimm_ctl(nvdimm, cmd, buf, buf_len);
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}
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static bool online_nvdimm_bus(struct cxl_nvdimm_bridge *cxl_nvb)
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{
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if (cxl_nvb->nvdimm_bus)
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return true;
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cxl_nvb->nvdimm_bus =
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nvdimm_bus_register(&cxl_nvb->dev, &cxl_nvb->nd_desc);
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return cxl_nvb->nvdimm_bus != NULL;
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}
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static int cxl_nvdimm_release_driver(struct device *dev, void *cxl_nvb)
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{
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struct cxl_nvdimm *cxl_nvd;
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if (!is_cxl_nvdimm(dev))
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return 0;
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cxl_nvd = to_cxl_nvdimm(dev);
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if (cxl_nvd->bridge != cxl_nvb)
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return 0;
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device_release_driver(dev);
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return 0;
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}
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static int cxl_pmem_region_release_driver(struct device *dev, void *cxl_nvb)
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{
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struct cxl_pmem_region *cxlr_pmem;
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if (!is_cxl_pmem_region(dev))
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return 0;
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cxlr_pmem = to_cxl_pmem_region(dev);
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if (cxlr_pmem->bridge != cxl_nvb)
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return 0;
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device_release_driver(dev);
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return 0;
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}
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static void offline_nvdimm_bus(struct cxl_nvdimm_bridge *cxl_nvb,
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struct nvdimm_bus *nvdimm_bus)
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{
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if (!nvdimm_bus)
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return;
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/*
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* Set the state of cxl_nvdimm devices to unbound / idle before
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* nvdimm_bus_unregister() rips the nvdimm objects out from
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* underneath them.
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*/
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bus_for_each_dev(&cxl_bus_type, NULL, cxl_nvb,
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cxl_pmem_region_release_driver);
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bus_for_each_dev(&cxl_bus_type, NULL, cxl_nvb,
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cxl_nvdimm_release_driver);
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nvdimm_bus_unregister(nvdimm_bus);
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}
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static void cxl_nvb_update_state(struct work_struct *work)
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{
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struct cxl_nvdimm_bridge *cxl_nvb =
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container_of(work, typeof(*cxl_nvb), state_work);
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struct nvdimm_bus *victim_bus = NULL;
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bool release = false, rescan = false;
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device_lock(&cxl_nvb->dev);
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switch (cxl_nvb->state) {
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case CXL_NVB_ONLINE:
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if (!online_nvdimm_bus(cxl_nvb)) {
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dev_err(&cxl_nvb->dev,
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"failed to establish nvdimm bus\n");
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release = true;
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} else
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rescan = true;
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break;
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case CXL_NVB_OFFLINE:
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case CXL_NVB_DEAD:
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victim_bus = cxl_nvb->nvdimm_bus;
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cxl_nvb->nvdimm_bus = NULL;
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break;
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default:
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break;
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}
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device_unlock(&cxl_nvb->dev);
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if (release)
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device_release_driver(&cxl_nvb->dev);
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if (rescan) {
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int rc = bus_rescan_devices(&cxl_bus_type);
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dev_dbg(&cxl_nvb->dev, "rescan: %d\n", rc);
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}
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offline_nvdimm_bus(cxl_nvb, victim_bus);
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put_device(&cxl_nvb->dev);
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}
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static void cxl_nvdimm_bridge_state_work(struct cxl_nvdimm_bridge *cxl_nvb)
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{
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/*
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* Take a reference that the workqueue will drop if new work
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* gets queued.
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*/
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get_device(&cxl_nvb->dev);
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if (!queue_work(cxl_pmem_wq, &cxl_nvb->state_work))
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put_device(&cxl_nvb->dev);
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}
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static void cxl_nvdimm_bridge_remove(struct device *dev)
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{
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struct cxl_nvdimm_bridge *cxl_nvb = to_cxl_nvdimm_bridge(dev);
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if (cxl_nvb->state == CXL_NVB_ONLINE)
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cxl_nvb->state = CXL_NVB_OFFLINE;
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cxl_nvdimm_bridge_state_work(cxl_nvb);
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}
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static int cxl_nvdimm_bridge_probe(struct device *dev)
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{
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struct cxl_nvdimm_bridge *cxl_nvb = to_cxl_nvdimm_bridge(dev);
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if (cxl_nvb->state == CXL_NVB_DEAD)
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return -ENXIO;
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if (cxl_nvb->state == CXL_NVB_NEW) {
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cxl_nvb->nd_desc = (struct nvdimm_bus_descriptor) {
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.provider_name = "CXL",
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.module = THIS_MODULE,
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.ndctl = cxl_pmem_ctl,
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};
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INIT_WORK(&cxl_nvb->state_work, cxl_nvb_update_state);
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}
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cxl_nvb->state = CXL_NVB_ONLINE;
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cxl_nvdimm_bridge_state_work(cxl_nvb);
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return 0;
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}
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static struct cxl_driver cxl_nvdimm_bridge_driver = {
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.name = "cxl_nvdimm_bridge",
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.probe = cxl_nvdimm_bridge_probe,
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.remove = cxl_nvdimm_bridge_remove,
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.id = CXL_DEVICE_NVDIMM_BRIDGE,
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};
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static int match_cxl_nvdimm(struct device *dev, void *data)
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{
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return is_cxl_nvdimm(dev);
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}
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static void unregister_nvdimm_region(void *nd_region)
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{
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struct cxl_nvdimm_bridge *cxl_nvb;
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struct cxl_pmem_region *cxlr_pmem;
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int i;
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cxlr_pmem = nd_region_provider_data(nd_region);
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cxl_nvb = cxlr_pmem->bridge;
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device_lock(&cxl_nvb->dev);
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for (i = 0; i < cxlr_pmem->nr_mappings; i++) {
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struct cxl_pmem_region_mapping *m = &cxlr_pmem->mapping[i];
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struct cxl_nvdimm *cxl_nvd = m->cxl_nvd;
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if (cxl_nvd->region) {
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put_device(&cxlr_pmem->dev);
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cxl_nvd->region = NULL;
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}
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}
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device_unlock(&cxl_nvb->dev);
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nvdimm_region_delete(nd_region);
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}
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static void cxlr_pmem_remove_resource(void *res)
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{
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remove_resource(res);
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}
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struct cxl_pmem_region_info {
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u64 offset;
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u64 serial;
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};
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static int cxl_pmem_region_probe(struct device *dev)
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{
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struct nd_mapping_desc mappings[CXL_DECODER_MAX_INTERLEAVE];
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struct cxl_pmem_region *cxlr_pmem = to_cxl_pmem_region(dev);
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struct cxl_region *cxlr = cxlr_pmem->cxlr;
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struct cxl_pmem_region_info *info = NULL;
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struct cxl_nvdimm_bridge *cxl_nvb;
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struct nd_interleave_set *nd_set;
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struct nd_region_desc ndr_desc;
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struct cxl_nvdimm *cxl_nvd;
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struct nvdimm *nvdimm;
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struct resource *res;
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int rc, i = 0;
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cxl_nvb = cxl_find_nvdimm_bridge(&cxlr_pmem->mapping[0].cxlmd->dev);
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if (!cxl_nvb) {
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dev_dbg(dev, "bridge not found\n");
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return -ENXIO;
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}
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cxlr_pmem->bridge = cxl_nvb;
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device_lock(&cxl_nvb->dev);
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if (!cxl_nvb->nvdimm_bus) {
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dev_dbg(dev, "nvdimm bus not found\n");
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rc = -ENXIO;
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goto err;
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}
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memset(&mappings, 0, sizeof(mappings));
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memset(&ndr_desc, 0, sizeof(ndr_desc));
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res = devm_kzalloc(dev, sizeof(*res), GFP_KERNEL);
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if (!res) {
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rc = -ENOMEM;
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goto err;
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}
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res->name = "Persistent Memory";
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res->start = cxlr_pmem->hpa_range.start;
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res->end = cxlr_pmem->hpa_range.end;
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res->flags = IORESOURCE_MEM;
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res->desc = IORES_DESC_PERSISTENT_MEMORY;
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rc = insert_resource(&iomem_resource, res);
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if (rc)
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goto err;
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rc = devm_add_action_or_reset(dev, cxlr_pmem_remove_resource, res);
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if (rc)
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goto err;
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ndr_desc.res = res;
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ndr_desc.provider_data = cxlr_pmem;
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ndr_desc.numa_node = memory_add_physaddr_to_nid(res->start);
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ndr_desc.target_node = phys_to_target_node(res->start);
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if (ndr_desc.target_node == NUMA_NO_NODE) {
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ndr_desc.target_node = ndr_desc.numa_node;
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dev_dbg(&cxlr->dev, "changing target node from %d to %d",
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NUMA_NO_NODE, ndr_desc.target_node);
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}
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nd_set = devm_kzalloc(dev, sizeof(*nd_set), GFP_KERNEL);
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if (!nd_set) {
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rc = -ENOMEM;
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goto err;
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}
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ndr_desc.memregion = cxlr->id;
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set_bit(ND_REGION_CXL, &ndr_desc.flags);
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set_bit(ND_REGION_PERSIST_MEMCTRL, &ndr_desc.flags);
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info = kmalloc_array(cxlr_pmem->nr_mappings, sizeof(*info), GFP_KERNEL);
|
|
if (!info) {
|
|
rc = -ENOMEM;
|
|
goto err;
|
|
}
|
|
|
|
for (i = 0; i < cxlr_pmem->nr_mappings; i++) {
|
|
struct cxl_pmem_region_mapping *m = &cxlr_pmem->mapping[i];
|
|
struct cxl_memdev *cxlmd = m->cxlmd;
|
|
struct cxl_dev_state *cxlds = cxlmd->cxlds;
|
|
struct device *d;
|
|
|
|
d = device_find_child(&cxlmd->dev, NULL, match_cxl_nvdimm);
|
|
if (!d) {
|
|
dev_dbg(dev, "[%d]: %s: no cxl_nvdimm found\n", i,
|
|
dev_name(&cxlmd->dev));
|
|
rc = -ENODEV;
|
|
goto err;
|
|
}
|
|
|
|
/* safe to drop ref now with bridge lock held */
|
|
put_device(d);
|
|
|
|
cxl_nvd = to_cxl_nvdimm(d);
|
|
nvdimm = dev_get_drvdata(&cxl_nvd->dev);
|
|
if (!nvdimm) {
|
|
dev_dbg(dev, "[%d]: %s: no nvdimm found\n", i,
|
|
dev_name(&cxlmd->dev));
|
|
rc = -ENODEV;
|
|
goto err;
|
|
}
|
|
cxl_nvd->region = cxlr_pmem;
|
|
get_device(&cxlr_pmem->dev);
|
|
m->cxl_nvd = cxl_nvd;
|
|
mappings[i] = (struct nd_mapping_desc) {
|
|
.nvdimm = nvdimm,
|
|
.start = m->start,
|
|
.size = m->size,
|
|
.position = i,
|
|
};
|
|
info[i].offset = m->start;
|
|
info[i].serial = cxlds->serial;
|
|
}
|
|
ndr_desc.num_mappings = cxlr_pmem->nr_mappings;
|
|
ndr_desc.mapping = mappings;
|
|
|
|
/*
|
|
* TODO enable CXL labels which skip the need for 'interleave-set cookie'
|
|
*/
|
|
nd_set->cookie1 =
|
|
nd_fletcher64(info, sizeof(*info) * cxlr_pmem->nr_mappings, 0);
|
|
nd_set->cookie2 = nd_set->cookie1;
|
|
ndr_desc.nd_set = nd_set;
|
|
|
|
cxlr_pmem->nd_region =
|
|
nvdimm_pmem_region_create(cxl_nvb->nvdimm_bus, &ndr_desc);
|
|
if (!cxlr_pmem->nd_region) {
|
|
rc = -ENOMEM;
|
|
goto err;
|
|
}
|
|
|
|
rc = devm_add_action_or_reset(dev, unregister_nvdimm_region,
|
|
cxlr_pmem->nd_region);
|
|
out:
|
|
kfree(info);
|
|
device_unlock(&cxl_nvb->dev);
|
|
put_device(&cxl_nvb->dev);
|
|
|
|
return rc;
|
|
|
|
err:
|
|
dev_dbg(dev, "failed to create nvdimm region\n");
|
|
for (i--; i >= 0; i--) {
|
|
nvdimm = mappings[i].nvdimm;
|
|
cxl_nvd = nvdimm_provider_data(nvdimm);
|
|
put_device(&cxl_nvd->region->dev);
|
|
cxl_nvd->region = NULL;
|
|
}
|
|
goto out;
|
|
}
|
|
|
|
static struct cxl_driver cxl_pmem_region_driver = {
|
|
.name = "cxl_pmem_region",
|
|
.probe = cxl_pmem_region_probe,
|
|
.id = CXL_DEVICE_PMEM_REGION,
|
|
};
|
|
|
|
/*
|
|
* Return all bridges to the CXL_NVB_NEW state to invalidate any
|
|
* ->state_work referring to the now destroyed cxl_pmem_wq.
|
|
*/
|
|
static int cxl_nvdimm_bridge_reset(struct device *dev, void *data)
|
|
{
|
|
struct cxl_nvdimm_bridge *cxl_nvb;
|
|
|
|
if (!is_cxl_nvdimm_bridge(dev))
|
|
return 0;
|
|
|
|
cxl_nvb = to_cxl_nvdimm_bridge(dev);
|
|
device_lock(dev);
|
|
cxl_nvb->state = CXL_NVB_NEW;
|
|
device_unlock(dev);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void destroy_cxl_pmem_wq(void)
|
|
{
|
|
destroy_workqueue(cxl_pmem_wq);
|
|
bus_for_each_dev(&cxl_bus_type, NULL, NULL, cxl_nvdimm_bridge_reset);
|
|
}
|
|
|
|
static __init int cxl_pmem_init(void)
|
|
{
|
|
int rc;
|
|
|
|
set_bit(CXL_MEM_COMMAND_ID_SET_SHUTDOWN_STATE, exclusive_cmds);
|
|
set_bit(CXL_MEM_COMMAND_ID_SET_LSA, exclusive_cmds);
|
|
|
|
cxl_pmem_wq = alloc_ordered_workqueue("cxl_pmem", 0);
|
|
if (!cxl_pmem_wq)
|
|
return -ENXIO;
|
|
|
|
rc = cxl_driver_register(&cxl_nvdimm_bridge_driver);
|
|
if (rc)
|
|
goto err_bridge;
|
|
|
|
rc = cxl_driver_register(&cxl_nvdimm_driver);
|
|
if (rc)
|
|
goto err_nvdimm;
|
|
|
|
rc = cxl_driver_register(&cxl_pmem_region_driver);
|
|
if (rc)
|
|
goto err_region;
|
|
|
|
return 0;
|
|
|
|
err_region:
|
|
cxl_driver_unregister(&cxl_nvdimm_driver);
|
|
err_nvdimm:
|
|
cxl_driver_unregister(&cxl_nvdimm_bridge_driver);
|
|
err_bridge:
|
|
destroy_cxl_pmem_wq();
|
|
return rc;
|
|
}
|
|
|
|
static __exit void cxl_pmem_exit(void)
|
|
{
|
|
cxl_driver_unregister(&cxl_pmem_region_driver);
|
|
cxl_driver_unregister(&cxl_nvdimm_driver);
|
|
cxl_driver_unregister(&cxl_nvdimm_bridge_driver);
|
|
destroy_cxl_pmem_wq();
|
|
}
|
|
|
|
MODULE_LICENSE("GPL v2");
|
|
module_init(cxl_pmem_init);
|
|
module_exit(cxl_pmem_exit);
|
|
MODULE_IMPORT_NS(CXL);
|
|
MODULE_ALIAS_CXL(CXL_DEVICE_NVDIMM_BRIDGE);
|
|
MODULE_ALIAS_CXL(CXL_DEVICE_NVDIMM);
|
|
MODULE_ALIAS_CXL(CXL_DEVICE_PMEM_REGION);
|