linux/arch/mips/loongson/loongson-3
Huacai Chen ef2f826c8f MIPS: Loongson-3: Enable the COP2 usage
Loongson-3 has some specific instructions (MMI/SIMD) in coprocessor 2.
COP2 isn't independent because it share COP1 (FPU)'s registers. This
patch enable the COP2 usage so user-space programs can use the MMI/SIMD
instructions. When COP2 exception happens, we enable both COP1 (FPU)
and COP2, only in this way the fp context can be saved and restored
correctly.

Signed-off-by: Huacai Chen <chenhc@lemote.com>
Cc: John Crispin <john@phrozen.org>
Cc: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Cc: linux-mips@linux-mips.org
Cc: Fuxin Zhang <zhangfx@lemote.com>
Cc: Zhangjin Wu <wuzhangjin@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/7189/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-07-30 21:47:17 +02:00
..
cop2-ex.c MIPS: Loongson-3: Enable the COP2 usage 2014-07-30 21:47:17 +02:00
irq.c MIPS: Add Loongson-3B support 2014-07-30 21:47:00 +02:00
Makefile MIPS: Loongson-3: Enable the COP2 usage 2014-07-30 21:47:17 +02:00
numa.c MIPS: Add NUMA support for Loongson-3 2014-07-30 21:46:19 +02:00
smp.c MIPS: Add Loongson-3B support 2014-07-30 21:47:00 +02:00
smp.h MIPS: Add Loongson-3B support 2014-07-30 21:47:00 +02:00