96efa118c0
The tegra20-mc device-tree binding has been changed, GART has been squashed into Memory Controller and now the clock property is mandatory for Tegra20, the DT compatible has been changed as well. Adapt driver to the DT changes. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
65 lines
1.6 KiB
C
65 lines
1.6 KiB
C
/*
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* Copyright (C) 2014 NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef MEMORY_TEGRA_MC_H
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#define MEMORY_TEGRA_MC_H
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#include <linux/io.h>
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#include <linux/types.h>
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#include <soc/tegra/mc.h>
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#define MC_INT_DECERR_MTS (1 << 16)
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#define MC_INT_SECERR_SEC (1 << 13)
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#define MC_INT_DECERR_VPR (1 << 12)
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#define MC_INT_INVALID_APB_ASID_UPDATE (1 << 11)
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#define MC_INT_INVALID_SMMU_PAGE (1 << 10)
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#define MC_INT_ARBITRATION_EMEM (1 << 9)
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#define MC_INT_SECURITY_VIOLATION (1 << 8)
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#define MC_INT_INVALID_GART_PAGE (1 << 7)
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#define MC_INT_DECERR_EMEM (1 << 6)
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static inline u32 mc_readl(struct tegra_mc *mc, unsigned long offset)
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{
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return readl(mc->regs + offset);
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}
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static inline void mc_writel(struct tegra_mc *mc, u32 value,
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unsigned long offset)
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{
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writel(value, mc->regs + offset);
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}
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extern const struct tegra_mc_reset_ops terga_mc_reset_ops_common;
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#ifdef CONFIG_ARCH_TEGRA_2x_SOC
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extern const struct tegra_mc_soc tegra20_mc_soc;
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#endif
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#ifdef CONFIG_ARCH_TEGRA_3x_SOC
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extern const struct tegra_mc_soc tegra30_mc_soc;
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#endif
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#ifdef CONFIG_ARCH_TEGRA_114_SOC
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extern const struct tegra_mc_soc tegra114_mc_soc;
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#endif
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#ifdef CONFIG_ARCH_TEGRA_124_SOC
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extern const struct tegra_mc_soc tegra124_mc_soc;
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#endif
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#ifdef CONFIG_ARCH_TEGRA_132_SOC
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extern const struct tegra_mc_soc tegra132_mc_soc;
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#endif
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#ifdef CONFIG_ARCH_TEGRA_210_SOC
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extern const struct tegra_mc_soc tegra210_mc_soc;
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#endif
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#endif /* MEMORY_TEGRA_MC_H */
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