Eugen Hristev 5987e6ded2 mmc: sdhci-of-at91: fix set_uhs_signaling rewriting of MC1R ... In set_uhs_signaling, the DDR bit is being set by fully writing the MC1R register. This can lead to accidental erase of certain bits in this register. Avoid this by doing a read-modify-write operation. Fixes: d0918764c1 ("mmc: sdhci-of-at91: fix MMC_DDR_52 timing selection") Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> Tested-by: Karl Olsen <karl@micro-technic.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20220630090926.15061-1-eugen.hristev@microchip.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>		2022-07-12 12:42:37 +02:00
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core	mmc: core: Replace with already defined values for readability	2022-07-12 12:38:49 +02:00
host	mmc: sdhci-of-at91: fix set_uhs_signaling rewriting of MC1R	2022-07-12 12:42:37 +02:00
Kconfig	treewide: Add SPDX license identifier - Makefile/Kconfig	2019-05-21 10:50:46 +02:00
Makefile	treewide: Add SPDX license identifier - Makefile/Kconfig	2019-05-21 10:50:46 +02:00