forked from Minki/linux
fe56b9e6a8
The Qlogic Everest Driver is the backend module for the QL4xxx ethernet
products by Qlogic.
This module serves two main purposes:
1. It's responsible to contain all the common code that will be shared
between the various drivers that would be used with said line of
products. Flows such as chip initialization and de-initialization
fall under this category.
2. It would abstract the protocol-specific HW & FW components, allowing
the protocol drivers to have a clean APIs which is detached in its
slowpath configuration from the actual HSI.
This adds a very basic module without any protocol-specific bits.
I.e., this adds a basic implementation that almost entirely falls under
the first category.
Signed-off-by: Yuval Mintz <Yuval.Mintz@qlogic.com>
Signed-off-by: Ariel Elior <Ariel.Elior@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
171 lines
4.4 KiB
C
171 lines
4.4 KiB
C
/* QLogic qed NIC Driver
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* Copyright (c) 2015 QLogic Corporation
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*
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* This software is available under the terms of the GNU General Public License
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* (GPL) Version 2, available from the file COPYING in the main directory of
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* this source tree.
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*/
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#include <linux/types.h>
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#include <asm/byteorder.h>
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#include <linux/bitops.h>
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#include <linux/errno.h>
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#include <linux/kernel.h>
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#include <linux/string.h>
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#include "qed.h"
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#include <linux/qed/qed_chain.h>
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#include "qed_cxt.h"
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#include "qed_hsi.h"
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#include "qed_hw.h"
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#include "qed_int.h"
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#include "qed_reg_addr.h"
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#include "qed_sp.h"
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int qed_sp_init_request(struct qed_hwfn *p_hwfn,
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struct qed_spq_entry **pp_ent,
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u32 cid,
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u16 opaque_fid,
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u8 cmd,
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u8 protocol,
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struct qed_sp_init_request_params *p_params)
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{
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int rc = -EINVAL;
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struct qed_spq_entry *p_ent = NULL;
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u32 opaque_cid = opaque_fid << 16 | cid;
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if (!pp_ent)
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return -ENOMEM;
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rc = qed_spq_get_entry(p_hwfn, pp_ent);
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if (rc != 0)
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return rc;
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p_ent = *pp_ent;
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p_ent->elem.hdr.cid = cpu_to_le32(opaque_cid);
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p_ent->elem.hdr.cmd_id = cmd;
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p_ent->elem.hdr.protocol_id = protocol;
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p_ent->priority = QED_SPQ_PRIORITY_NORMAL;
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p_ent->comp_mode = p_params->comp_mode;
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p_ent->comp_done.done = 0;
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switch (p_ent->comp_mode) {
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case QED_SPQ_MODE_EBLOCK:
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p_ent->comp_cb.cookie = &p_ent->comp_done;
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break;
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case QED_SPQ_MODE_BLOCK:
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if (!p_params->p_comp_data)
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return -EINVAL;
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p_ent->comp_cb.cookie = p_params->p_comp_data->cookie;
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break;
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case QED_SPQ_MODE_CB:
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if (!p_params->p_comp_data)
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p_ent->comp_cb.function = NULL;
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else
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p_ent->comp_cb = *p_params->p_comp_data;
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break;
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default:
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DP_NOTICE(p_hwfn, "Unknown SPQE completion mode %d\n",
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p_ent->comp_mode);
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return -EINVAL;
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}
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DP_VERBOSE(p_hwfn, QED_MSG_SPQ,
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"Initialized: CID %08x cmd %02x protocol %02x data_addr %lu comp_mode [%s]\n",
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opaque_cid, cmd, protocol,
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(unsigned long)&p_ent->ramrod,
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D_TRINE(p_ent->comp_mode, QED_SPQ_MODE_EBLOCK,
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QED_SPQ_MODE_BLOCK, "MODE_EBLOCK", "MODE_BLOCK",
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"MODE_CB"));
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if (p_params->ramrod_data_size)
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memset(&p_ent->ramrod, 0, p_params->ramrod_data_size);
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return 0;
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}
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int qed_sp_pf_start(struct qed_hwfn *p_hwfn,
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enum mf_mode mode)
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{
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struct qed_sp_init_request_params params;
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struct pf_start_ramrod_data *p_ramrod = NULL;
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u16 sb = qed_int_get_sp_sb_id(p_hwfn);
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u8 sb_index = p_hwfn->p_eq->eq_sb_index;
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struct qed_spq_entry *p_ent = NULL;
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int rc = -EINVAL;
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/* update initial eq producer */
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qed_eq_prod_update(p_hwfn,
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qed_chain_get_prod_idx(&p_hwfn->p_eq->chain));
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memset(¶ms, 0, sizeof(params));
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params.ramrod_data_size = sizeof(*p_ramrod);
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params.comp_mode = QED_SPQ_MODE_EBLOCK;
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rc = qed_sp_init_request(p_hwfn,
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&p_ent,
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qed_spq_get_cid(p_hwfn),
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p_hwfn->hw_info.opaque_fid,
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COMMON_RAMROD_PF_START,
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PROTOCOLID_COMMON,
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¶ms);
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if (rc)
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return rc;
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p_ramrod = &p_ent->ramrod.pf_start;
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p_ramrod->event_ring_sb_id = cpu_to_le16(sb);
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p_ramrod->event_ring_sb_index = sb_index;
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p_ramrod->path_id = QED_PATH_ID(p_hwfn);
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p_ramrod->dont_log_ramrods = 0;
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p_ramrod->log_type_mask = cpu_to_le16(0xf);
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p_ramrod->mf_mode = mode;
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p_ramrod->outer_tag = p_hwfn->hw_info.ovlan;
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/* Place EQ address in RAMROD */
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p_ramrod->event_ring_pbl_addr.hi =
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DMA_HI_LE(p_hwfn->p_eq->chain.pbl.p_phys_table);
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p_ramrod->event_ring_pbl_addr.lo =
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DMA_LO_LE(p_hwfn->p_eq->chain.pbl.p_phys_table);
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p_ramrod->event_ring_num_pages = (u8)p_hwfn->p_eq->chain.page_cnt;
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p_ramrod->consolid_q_pbl_addr.hi =
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DMA_HI_LE(p_hwfn->p_consq->chain.pbl.p_phys_table);
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p_ramrod->consolid_q_pbl_addr.lo =
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DMA_LO_LE(p_hwfn->p_consq->chain.pbl.p_phys_table);
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p_hwfn->hw_info.personality = PERSONALITY_ETH;
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DP_VERBOSE(p_hwfn, QED_MSG_SPQ,
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"Setting event_ring_sb [id %04x index %02x], mf [%s] outer_tag [%d]\n",
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sb, sb_index,
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(p_ramrod->mf_mode == SF) ? "SF" : "Multi-Pf",
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p_ramrod->outer_tag);
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return qed_spq_post(p_hwfn, p_ent, NULL);
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}
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int qed_sp_pf_stop(struct qed_hwfn *p_hwfn)
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{
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struct qed_sp_init_request_params params;
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struct qed_spq_entry *p_ent = NULL;
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int rc = -EINVAL;
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memset(¶ms, 0, sizeof(params));
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params.comp_mode = QED_SPQ_MODE_EBLOCK;
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rc = qed_sp_init_request(p_hwfn, &p_ent, qed_spq_get_cid(p_hwfn),
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p_hwfn->hw_info.opaque_fid,
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COMMON_RAMROD_PF_STOP, PROTOCOLID_COMMON,
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¶ms);
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if (rc)
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return rc;
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return qed_spq_post(p_hwfn, p_ent, NULL);
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}
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