27ecf87c8a
When 10GbE SFP+ module is not plugged in or cable is not connected, the link status register does not report the proper state due to floating signal. This patch checks the module present status via an GPIO to determine whether to ignore the link status register and report link down. Signed-off-by: Quan Nguyen <qnguyen@apm.com> Signed-off-by: Iyappan Subramanian <isubramanian@apm.com> Tested-by: Fushen Chen <fchen@apm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
245 lines
6.4 KiB
C
245 lines
6.4 KiB
C
/* Applied Micro X-Gene SoC Ethernet Driver
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*
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* Copyright (c) 2014, Applied Micro Circuits Corporation
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* Authors: Iyappan Subramanian <isubramanian@apm.com>
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* Ravi Patel <rapatel@apm.com>
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* Keyur Chudgar <kchudgar@apm.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __XGENE_ENET_MAIN_H__
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#define __XGENE_ENET_MAIN_H__
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#include <linux/acpi.h>
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#include <linux/clk.h>
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#include <linux/efi.h>
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#include <linux/irq.h>
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#include <linux/io.h>
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#include <linux/of_platform.h>
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#include <linux/of_net.h>
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#include <linux/of_mdio.h>
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#include <linux/module.h>
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#include <net/ip.h>
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#include <linux/prefetch.h>
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#include <linux/if_vlan.h>
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#include <linux/phy.h>
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#include "xgene_enet_hw.h"
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#include "xgene_enet_cle.h"
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#include "xgene_enet_ring2.h"
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#include "../../../phy/mdio-xgene.h"
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#define XGENE_DRV_VERSION "v1.0"
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#define XGENE_ENET_MAX_MTU 1536
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#define SKB_BUFFER_SIZE (XGENE_ENET_MAX_MTU - NET_IP_ALIGN)
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#define BUFLEN_16K (16 * 1024)
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#define NUM_PKT_BUF 64
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#define NUM_BUFPOOL 32
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#define MAX_EXP_BUFFS 256
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#define XGENE_ENET_MSS 1448
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#define XGENE_MIN_ENET_FRAME_SIZE 60
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#define XGENE_MAX_ENET_IRQ 16
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#define XGENE_NUM_RX_RING 8
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#define XGENE_NUM_TX_RING 8
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#define XGENE_NUM_TXC_RING 8
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#define START_CPU_BUFNUM_0 0
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#define START_ETH_BUFNUM_0 2
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#define START_BP_BUFNUM_0 0x22
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#define START_RING_NUM_0 8
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#define START_CPU_BUFNUM_1 12
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#define START_ETH_BUFNUM_1 10
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#define START_BP_BUFNUM_1 0x2A
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#define START_RING_NUM_1 264
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#define XG_START_CPU_BUFNUM_1 12
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#define XG_START_ETH_BUFNUM_1 2
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#define XG_START_BP_BUFNUM_1 0x22
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#define XG_START_RING_NUM_1 264
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#define X2_START_CPU_BUFNUM_0 0
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#define X2_START_ETH_BUFNUM_0 0
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#define X2_START_BP_BUFNUM_0 0x20
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#define X2_START_RING_NUM_0 0
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#define X2_START_CPU_BUFNUM_1 0xc
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#define X2_START_ETH_BUFNUM_1 0
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#define X2_START_BP_BUFNUM_1 0x20
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#define X2_START_RING_NUM_1 256
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#define IRQ_ID_SIZE 16
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#define PHY_POLL_LINK_ON (10 * HZ)
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#define PHY_POLL_LINK_OFF (PHY_POLL_LINK_ON / 5)
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enum xgene_enet_id {
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XGENE_ENET1 = 1,
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XGENE_ENET2
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};
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/* software context of a descriptor ring */
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struct xgene_enet_desc_ring {
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struct net_device *ndev;
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u16 id;
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u16 num;
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u16 head;
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u16 tail;
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u16 exp_buf_tail;
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u16 slots;
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u16 irq;
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char irq_name[IRQ_ID_SIZE];
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u32 size;
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u32 state[X2_NUM_RING_CONFIG];
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void __iomem *cmd_base;
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void __iomem *cmd;
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dma_addr_t dma;
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dma_addr_t irq_mbox_dma;
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void *irq_mbox_addr;
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u16 dst_ring_num;
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u8 nbufpool;
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u8 index;
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struct sk_buff *(*rx_skb);
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struct sk_buff *(*cp_skb);
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dma_addr_t *frag_dma_addr;
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enum xgene_enet_ring_cfgsize cfgsize;
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struct xgene_enet_desc_ring *cp_ring;
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struct xgene_enet_desc_ring *buf_pool;
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struct napi_struct napi;
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union {
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void *desc_addr;
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struct xgene_enet_raw_desc *raw_desc;
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struct xgene_enet_raw_desc16 *raw_desc16;
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};
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__le64 *exp_bufs;
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u64 tx_packets;
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u64 tx_bytes;
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u64 rx_packets;
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u64 rx_bytes;
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u64 rx_dropped;
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u64 rx_errors;
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u64 rx_length_errors;
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u64 rx_crc_errors;
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u64 rx_frame_errors;
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u64 rx_fifo_errors;
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};
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struct xgene_mac_ops {
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void (*init)(struct xgene_enet_pdata *pdata);
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void (*reset)(struct xgene_enet_pdata *pdata);
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void (*tx_enable)(struct xgene_enet_pdata *pdata);
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void (*rx_enable)(struct xgene_enet_pdata *pdata);
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void (*tx_disable)(struct xgene_enet_pdata *pdata);
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void (*rx_disable)(struct xgene_enet_pdata *pdata);
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void (*set_speed)(struct xgene_enet_pdata *pdata);
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void (*set_mac_addr)(struct xgene_enet_pdata *pdata);
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void (*set_mss)(struct xgene_enet_pdata *pdata);
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void (*link_state)(struct work_struct *work);
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};
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struct xgene_port_ops {
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int (*reset)(struct xgene_enet_pdata *pdata);
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void (*clear)(struct xgene_enet_pdata *pdata,
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struct xgene_enet_desc_ring *ring);
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void (*cle_bypass)(struct xgene_enet_pdata *pdata,
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u32 dst_ring_num, u16 bufpool_id);
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void (*shutdown)(struct xgene_enet_pdata *pdata);
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};
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struct xgene_ring_ops {
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u8 num_ring_config;
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u8 num_ring_id_shift;
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struct xgene_enet_desc_ring * (*setup)(struct xgene_enet_desc_ring *);
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void (*clear)(struct xgene_enet_desc_ring *);
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void (*wr_cmd)(struct xgene_enet_desc_ring *, int);
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u32 (*len)(struct xgene_enet_desc_ring *);
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void (*coalesce)(struct xgene_enet_desc_ring *);
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};
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struct xgene_cle_ops {
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int (*cle_init)(struct xgene_enet_pdata *pdata);
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};
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/* ethernet private data */
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struct xgene_enet_pdata {
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struct net_device *ndev;
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struct mii_bus *mdio_bus;
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struct phy_device *phy_dev;
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int phy_speed;
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struct clk *clk;
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struct platform_device *pdev;
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enum xgene_enet_id enet_id;
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struct xgene_enet_desc_ring *tx_ring[XGENE_NUM_TX_RING];
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struct xgene_enet_desc_ring *rx_ring[XGENE_NUM_RX_RING];
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u16 tx_level[XGENE_NUM_TX_RING];
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u16 txc_level[XGENE_NUM_TX_RING];
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char *dev_name;
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u32 rx_buff_cnt;
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u32 tx_qcnt_hi;
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u32 irqs[XGENE_MAX_ENET_IRQ];
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u8 rxq_cnt;
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u8 txq_cnt;
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u8 cq_cnt;
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void __iomem *eth_csr_addr;
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void __iomem *eth_ring_if_addr;
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void __iomem *eth_diag_csr_addr;
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void __iomem *mcx_mac_addr;
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void __iomem *mcx_mac_csr_addr;
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void __iomem *base_addr;
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void __iomem *pcs_addr;
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void __iomem *ring_csr_addr;
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void __iomem *ring_cmd_addr;
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int phy_mode;
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enum xgene_enet_rm rm;
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struct xgene_enet_cle cle;
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struct rtnl_link_stats64 stats;
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const struct xgene_mac_ops *mac_ops;
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const struct xgene_port_ops *port_ops;
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struct xgene_ring_ops *ring_ops;
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const struct xgene_cle_ops *cle_ops;
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struct delayed_work link_work;
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u32 port_id;
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u8 cpu_bufnum;
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u8 eth_bufnum;
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u8 bp_bufnum;
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u16 ring_num;
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u32 mss;
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u8 tx_delay;
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u8 rx_delay;
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bool mdio_driver;
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struct gpio_desc *sfp_rdy;
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};
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struct xgene_indirect_ctl {
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void __iomem *addr;
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void __iomem *ctl;
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void __iomem *cmd;
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void __iomem *cmd_done;
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};
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static inline struct device *ndev_to_dev(struct net_device *ndev)
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{
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return ndev->dev.parent;
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}
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static inline u16 xgene_enet_dst_ring_num(struct xgene_enet_desc_ring *ring)
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{
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struct xgene_enet_pdata *pdata = netdev_priv(ring->ndev);
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return ((u16)pdata->rm << 10) | ring->num;
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}
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void xgene_enet_set_ethtool_ops(struct net_device *netdev);
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#endif /* __XGENE_ENET_MAIN_H__ */
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