forked from Minki/linux
8505feaed9
At present the ETF or ETR gives out the entire device buffer, even if there is less or even no trace data available. This patch limits the trace data given out to the actual trace data collected. Cc: mathieu.poirier@linaro.org Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
607 lines
15 KiB
C
607 lines
15 KiB
C
/*
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* Copyright(C) 2016 Linaro Limited. All rights reserved.
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* Author: Mathieu Poirier <mathieu.poirier@linaro.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/circ_buf.h>
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#include <linux/coresight.h>
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#include <linux/perf_event.h>
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#include <linux/slab.h>
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#include "coresight-priv.h"
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#include "coresight-tmc.h"
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void tmc_etb_enable_hw(struct tmc_drvdata *drvdata)
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{
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CS_UNLOCK(drvdata->base);
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/* Wait for TMCSReady bit to be set */
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tmc_wait_for_tmcready(drvdata);
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writel_relaxed(TMC_MODE_CIRCULAR_BUFFER, drvdata->base + TMC_MODE);
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writel_relaxed(TMC_FFCR_EN_FMT | TMC_FFCR_EN_TI |
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TMC_FFCR_FON_FLIN | TMC_FFCR_FON_TRIG_EVT |
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TMC_FFCR_TRIGON_TRIGIN,
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drvdata->base + TMC_FFCR);
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writel_relaxed(drvdata->trigger_cntr, drvdata->base + TMC_TRG);
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tmc_enable_hw(drvdata);
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CS_LOCK(drvdata->base);
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}
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static void tmc_etb_dump_hw(struct tmc_drvdata *drvdata)
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{
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char *bufp;
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u32 read_data;
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int i;
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bufp = drvdata->buf;
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drvdata->len = 0;
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while (1) {
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for (i = 0; i < drvdata->memwidth; i++) {
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read_data = readl_relaxed(drvdata->base + TMC_RRD);
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if (read_data == 0xFFFFFFFF)
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return;
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memcpy(bufp, &read_data, 4);
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bufp += 4;
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drvdata->len += 4;
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}
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}
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}
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static void tmc_etb_disable_hw(struct tmc_drvdata *drvdata)
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{
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CS_UNLOCK(drvdata->base);
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tmc_flush_and_stop(drvdata);
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/*
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* When operating in sysFS mode the content of the buffer needs to be
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* read before the TMC is disabled.
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*/
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if (local_read(&drvdata->mode) == CS_MODE_SYSFS)
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tmc_etb_dump_hw(drvdata);
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tmc_disable_hw(drvdata);
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CS_LOCK(drvdata->base);
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}
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static void tmc_etf_enable_hw(struct tmc_drvdata *drvdata)
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{
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CS_UNLOCK(drvdata->base);
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/* Wait for TMCSReady bit to be set */
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tmc_wait_for_tmcready(drvdata);
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writel_relaxed(TMC_MODE_HARDWARE_FIFO, drvdata->base + TMC_MODE);
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writel_relaxed(TMC_FFCR_EN_FMT | TMC_FFCR_EN_TI,
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drvdata->base + TMC_FFCR);
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writel_relaxed(0x0, drvdata->base + TMC_BUFWM);
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tmc_enable_hw(drvdata);
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CS_LOCK(drvdata->base);
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}
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static void tmc_etf_disable_hw(struct tmc_drvdata *drvdata)
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{
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CS_UNLOCK(drvdata->base);
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tmc_flush_and_stop(drvdata);
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tmc_disable_hw(drvdata);
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CS_LOCK(drvdata->base);
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}
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static int tmc_enable_etf_sink_sysfs(struct coresight_device *csdev, u32 mode)
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{
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int ret = 0;
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bool used = false;
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char *buf = NULL;
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long val;
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unsigned long flags;
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struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
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/* This shouldn't be happening */
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if (WARN_ON(mode != CS_MODE_SYSFS))
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return -EINVAL;
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/*
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* If we don't have a buffer release the lock and allocate memory.
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* Otherwise keep the lock and move along.
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*/
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spin_lock_irqsave(&drvdata->spinlock, flags);
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if (!drvdata->buf) {
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spin_unlock_irqrestore(&drvdata->spinlock, flags);
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/* Allocating the memory here while outside of the spinlock */
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buf = kzalloc(drvdata->size, GFP_KERNEL);
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if (!buf)
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return -ENOMEM;
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/* Let's try again */
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spin_lock_irqsave(&drvdata->spinlock, flags);
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}
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if (drvdata->reading) {
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ret = -EBUSY;
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goto out;
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}
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val = local_xchg(&drvdata->mode, mode);
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/*
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* In sysFS mode we can have multiple writers per sink. Since this
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* sink is already enabled no memory is needed and the HW need not be
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* touched.
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*/
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if (val == CS_MODE_SYSFS)
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goto out;
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/*
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* If drvdata::buf isn't NULL, memory was allocated for a previous
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* trace run but wasn't read. If so simply zero-out the memory.
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* Otherwise use the memory allocated above.
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*
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* The memory is freed when users read the buffer using the
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* /dev/xyz.{etf|etb} interface. See tmc_read_unprepare_etf() for
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* details.
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*/
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if (drvdata->buf) {
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memset(drvdata->buf, 0, drvdata->size);
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} else {
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used = true;
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drvdata->buf = buf;
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}
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tmc_etb_enable_hw(drvdata);
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out:
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spin_unlock_irqrestore(&drvdata->spinlock, flags);
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/* Free memory outside the spinlock if need be */
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if (!used && buf)
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kfree(buf);
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if (!ret)
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dev_info(drvdata->dev, "TMC-ETB/ETF enabled\n");
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return ret;
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}
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static int tmc_enable_etf_sink_perf(struct coresight_device *csdev, u32 mode)
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{
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int ret = 0;
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long val;
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unsigned long flags;
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struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
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/* This shouldn't be happening */
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if (WARN_ON(mode != CS_MODE_PERF))
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return -EINVAL;
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spin_lock_irqsave(&drvdata->spinlock, flags);
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if (drvdata->reading) {
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ret = -EINVAL;
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goto out;
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}
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val = local_xchg(&drvdata->mode, mode);
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/*
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* In Perf mode there can be only one writer per sink. There
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* is also no need to continue if the ETB/ETR is already operated
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* from sysFS.
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*/
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if (val != CS_MODE_DISABLED) {
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ret = -EINVAL;
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goto out;
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}
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tmc_etb_enable_hw(drvdata);
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out:
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spin_unlock_irqrestore(&drvdata->spinlock, flags);
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return ret;
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}
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static int tmc_enable_etf_sink(struct coresight_device *csdev, u32 mode)
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{
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switch (mode) {
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case CS_MODE_SYSFS:
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return tmc_enable_etf_sink_sysfs(csdev, mode);
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case CS_MODE_PERF:
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return tmc_enable_etf_sink_perf(csdev, mode);
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}
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/* We shouldn't be here */
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return -EINVAL;
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}
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static void tmc_disable_etf_sink(struct coresight_device *csdev)
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{
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long val;
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unsigned long flags;
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struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
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spin_lock_irqsave(&drvdata->spinlock, flags);
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if (drvdata->reading) {
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spin_unlock_irqrestore(&drvdata->spinlock, flags);
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return;
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}
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val = local_xchg(&drvdata->mode, CS_MODE_DISABLED);
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/* Disable the TMC only if it needs to */
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if (val != CS_MODE_DISABLED)
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tmc_etb_disable_hw(drvdata);
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spin_unlock_irqrestore(&drvdata->spinlock, flags);
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dev_info(drvdata->dev, "TMC-ETB/ETF disabled\n");
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}
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static int tmc_enable_etf_link(struct coresight_device *csdev,
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int inport, int outport)
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{
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unsigned long flags;
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struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
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spin_lock_irqsave(&drvdata->spinlock, flags);
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if (drvdata->reading) {
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spin_unlock_irqrestore(&drvdata->spinlock, flags);
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return -EBUSY;
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}
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tmc_etf_enable_hw(drvdata);
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local_set(&drvdata->mode, CS_MODE_SYSFS);
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spin_unlock_irqrestore(&drvdata->spinlock, flags);
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dev_info(drvdata->dev, "TMC-ETF enabled\n");
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return 0;
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}
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static void tmc_disable_etf_link(struct coresight_device *csdev,
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int inport, int outport)
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{
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unsigned long flags;
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struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
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spin_lock_irqsave(&drvdata->spinlock, flags);
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if (drvdata->reading) {
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spin_unlock_irqrestore(&drvdata->spinlock, flags);
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return;
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}
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tmc_etf_disable_hw(drvdata);
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local_set(&drvdata->mode, CS_MODE_DISABLED);
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spin_unlock_irqrestore(&drvdata->spinlock, flags);
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dev_info(drvdata->dev, "TMC disabled\n");
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}
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static void *tmc_alloc_etf_buffer(struct coresight_device *csdev, int cpu,
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void **pages, int nr_pages, bool overwrite)
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{
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int node;
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struct cs_buffers *buf;
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if (cpu == -1)
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cpu = smp_processor_id();
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node = cpu_to_node(cpu);
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/* Allocate memory structure for interaction with Perf */
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buf = kzalloc_node(sizeof(struct cs_buffers), GFP_KERNEL, node);
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if (!buf)
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return NULL;
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buf->snapshot = overwrite;
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buf->nr_pages = nr_pages;
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buf->data_pages = pages;
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return buf;
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}
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static void tmc_free_etf_buffer(void *config)
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{
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struct cs_buffers *buf = config;
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kfree(buf);
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}
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static int tmc_set_etf_buffer(struct coresight_device *csdev,
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struct perf_output_handle *handle,
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void *sink_config)
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{
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int ret = 0;
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unsigned long head;
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struct cs_buffers *buf = sink_config;
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/* wrap head around to the amount of space we have */
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head = handle->head & ((buf->nr_pages << PAGE_SHIFT) - 1);
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/* find the page to write to */
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buf->cur = head / PAGE_SIZE;
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/* and offset within that page */
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buf->offset = head % PAGE_SIZE;
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local_set(&buf->data_size, 0);
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return ret;
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}
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static unsigned long tmc_reset_etf_buffer(struct coresight_device *csdev,
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struct perf_output_handle *handle,
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void *sink_config, bool *lost)
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{
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long size = 0;
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struct cs_buffers *buf = sink_config;
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if (buf) {
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/*
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* In snapshot mode ->data_size holds the new address of the
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* ring buffer's head. The size itself is the whole address
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* range since we want the latest information.
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*/
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if (buf->snapshot)
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handle->head = local_xchg(&buf->data_size,
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buf->nr_pages << PAGE_SHIFT);
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/*
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* Tell the tracer PMU how much we got in this run and if
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* something went wrong along the way. Nobody else can use
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* this cs_buffers instance until we are done. As such
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* resetting parameters here and squaring off with the ring
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* buffer API in the tracer PMU is fine.
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*/
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*lost = !!local_xchg(&buf->lost, 0);
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size = local_xchg(&buf->data_size, 0);
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}
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return size;
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}
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static void tmc_update_etf_buffer(struct coresight_device *csdev,
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struct perf_output_handle *handle,
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void *sink_config)
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{
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int i, cur;
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u32 *buf_ptr;
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u32 read_ptr, write_ptr;
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u32 status, to_read;
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unsigned long offset;
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struct cs_buffers *buf = sink_config;
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struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
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if (!buf)
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return;
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/* This shouldn't happen */
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if (WARN_ON_ONCE(local_read(&drvdata->mode) != CS_MODE_PERF))
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return;
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CS_UNLOCK(drvdata->base);
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tmc_flush_and_stop(drvdata);
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read_ptr = readl_relaxed(drvdata->base + TMC_RRP);
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write_ptr = readl_relaxed(drvdata->base + TMC_RWP);
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/*
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* Get a hold of the status register and see if a wrap around
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* has occurred. If so adjust things accordingly.
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*/
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status = readl_relaxed(drvdata->base + TMC_STS);
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if (status & TMC_STS_FULL) {
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local_inc(&buf->lost);
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to_read = drvdata->size;
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} else {
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to_read = CIRC_CNT(write_ptr, read_ptr, drvdata->size);
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}
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/*
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* The TMC RAM buffer may be bigger than the space available in the
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* perf ring buffer (handle->size). If so advance the RRP so that we
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* get the latest trace data.
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*/
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if (to_read > handle->size) {
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u32 mask = 0;
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/*
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* The value written to RRP must be byte-address aligned to
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* the width of the trace memory databus _and_ to a frame
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* boundary (16 byte), whichever is the biggest. For example,
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* for 32-bit, 64-bit and 128-bit wide trace memory, the four
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* LSBs must be 0s. For 256-bit wide trace memory, the five
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* LSBs must be 0s.
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*/
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switch (drvdata->memwidth) {
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case TMC_MEM_INTF_WIDTH_32BITS:
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case TMC_MEM_INTF_WIDTH_64BITS:
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case TMC_MEM_INTF_WIDTH_128BITS:
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mask = GENMASK(31, 5);
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break;
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case TMC_MEM_INTF_WIDTH_256BITS:
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mask = GENMASK(31, 6);
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break;
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}
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/*
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* Make sure the new size is aligned in accordance with the
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* requirement explained above.
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*/
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to_read = handle->size & mask;
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/* Move the RAM read pointer up */
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read_ptr = (write_ptr + drvdata->size) - to_read;
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/* Make sure we are still within our limits */
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if (read_ptr > (drvdata->size - 1))
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read_ptr -= drvdata->size;
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/* Tell the HW */
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writel_relaxed(read_ptr, drvdata->base + TMC_RRP);
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local_inc(&buf->lost);
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}
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cur = buf->cur;
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offset = buf->offset;
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/* for every byte to read */
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for (i = 0; i < to_read; i += 4) {
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buf_ptr = buf->data_pages[cur] + offset;
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*buf_ptr = readl_relaxed(drvdata->base + TMC_RRD);
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offset += 4;
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if (offset >= PAGE_SIZE) {
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offset = 0;
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cur++;
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/* wrap around at the end of the buffer */
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cur &= buf->nr_pages - 1;
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}
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}
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/*
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* In snapshot mode all we have to do is communicate to
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* perf_aux_output_end() the address of the current head. In full
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* trace mode the same function expects a size to move rb->aux_head
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* forward.
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*/
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if (buf->snapshot)
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local_set(&buf->data_size, (cur * PAGE_SIZE) + offset);
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else
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local_add(to_read, &buf->data_size);
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CS_LOCK(drvdata->base);
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}
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static const struct coresight_ops_sink tmc_etf_sink_ops = {
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.enable = tmc_enable_etf_sink,
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.disable = tmc_disable_etf_sink,
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.alloc_buffer = tmc_alloc_etf_buffer,
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.free_buffer = tmc_free_etf_buffer,
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.set_buffer = tmc_set_etf_buffer,
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.reset_buffer = tmc_reset_etf_buffer,
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.update_buffer = tmc_update_etf_buffer,
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};
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static const struct coresight_ops_link tmc_etf_link_ops = {
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.enable = tmc_enable_etf_link,
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.disable = tmc_disable_etf_link,
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};
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const struct coresight_ops tmc_etb_cs_ops = {
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.sink_ops = &tmc_etf_sink_ops,
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};
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const struct coresight_ops tmc_etf_cs_ops = {
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.sink_ops = &tmc_etf_sink_ops,
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.link_ops = &tmc_etf_link_ops,
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};
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int tmc_read_prepare_etb(struct tmc_drvdata *drvdata)
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{
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long val;
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enum tmc_mode mode;
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int ret = 0;
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unsigned long flags;
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/* config types are set a boot time and never change */
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if (WARN_ON_ONCE(drvdata->config_type != TMC_CONFIG_TYPE_ETB &&
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drvdata->config_type != TMC_CONFIG_TYPE_ETF))
|
|
return -EINVAL;
|
|
|
|
spin_lock_irqsave(&drvdata->spinlock, flags);
|
|
|
|
if (drvdata->reading) {
|
|
ret = -EBUSY;
|
|
goto out;
|
|
}
|
|
|
|
/* There is no point in reading a TMC in HW FIFO mode */
|
|
mode = readl_relaxed(drvdata->base + TMC_MODE);
|
|
if (mode != TMC_MODE_CIRCULAR_BUFFER) {
|
|
ret = -EINVAL;
|
|
goto out;
|
|
}
|
|
|
|
val = local_read(&drvdata->mode);
|
|
/* Don't interfere if operated from Perf */
|
|
if (val == CS_MODE_PERF) {
|
|
ret = -EINVAL;
|
|
goto out;
|
|
}
|
|
|
|
/* If drvdata::buf is NULL the trace data has been read already */
|
|
if (drvdata->buf == NULL) {
|
|
ret = -EINVAL;
|
|
goto out;
|
|
}
|
|
|
|
/* Disable the TMC if need be */
|
|
if (val == CS_MODE_SYSFS)
|
|
tmc_etb_disable_hw(drvdata);
|
|
|
|
drvdata->reading = true;
|
|
out:
|
|
spin_unlock_irqrestore(&drvdata->spinlock, flags);
|
|
|
|
return ret;
|
|
}
|
|
|
|
int tmc_read_unprepare_etb(struct tmc_drvdata *drvdata)
|
|
{
|
|
char *buf = NULL;
|
|
enum tmc_mode mode;
|
|
unsigned long flags;
|
|
|
|
/* config types are set a boot time and never change */
|
|
if (WARN_ON_ONCE(drvdata->config_type != TMC_CONFIG_TYPE_ETB &&
|
|
drvdata->config_type != TMC_CONFIG_TYPE_ETF))
|
|
return -EINVAL;
|
|
|
|
spin_lock_irqsave(&drvdata->spinlock, flags);
|
|
|
|
/* There is no point in reading a TMC in HW FIFO mode */
|
|
mode = readl_relaxed(drvdata->base + TMC_MODE);
|
|
if (mode != TMC_MODE_CIRCULAR_BUFFER) {
|
|
spin_unlock_irqrestore(&drvdata->spinlock, flags);
|
|
return -EINVAL;
|
|
}
|
|
|
|
/* Re-enable the TMC if need be */
|
|
if (local_read(&drvdata->mode) == CS_MODE_SYSFS) {
|
|
/*
|
|
* The trace run will continue with the same allocated trace
|
|
* buffer. As such zero-out the buffer so that we don't end
|
|
* up with stale data.
|
|
*
|
|
* Since the tracer is still enabled drvdata::buf
|
|
* can't be NULL.
|
|
*/
|
|
memset(drvdata->buf, 0, drvdata->size);
|
|
tmc_etb_enable_hw(drvdata);
|
|
} else {
|
|
/*
|
|
* The ETB/ETF is not tracing and the buffer was just read.
|
|
* As such prepare to free the trace buffer.
|
|
*/
|
|
buf = drvdata->buf;
|
|
drvdata->buf = NULL;
|
|
}
|
|
|
|
drvdata->reading = false;
|
|
spin_unlock_irqrestore(&drvdata->spinlock, flags);
|
|
|
|
/*
|
|
* Free allocated memory outside of the spinlock. There is no need
|
|
* to assert the validity of 'buf' since calling kfree(NULL) is safe.
|
|
*/
|
|
kfree(buf);
|
|
|
|
return 0;
|
|
}
|