forked from Minki/linux
5789fee934
Sometimes, due to high interrupt latency in the continuous mode of DMA transfer, the half buffer complete interrupt is handled after DMA has transferred the full buffer. When this is detected, stop DMA immediately and restart with the next buffer if the next buffer is ready. originally fixed by Victor(Weiguo) Pan <wpan@nvidia.com> In place of using the simple spin_lock()/spi_unlock() in the interrupt thread, using the spin_lock_irqsave() and spin_unlock_irqrestore(). The lock is shared between the normal process context and interrupt context. originally fixed by Laxman Dewangan (ldewangan@nvidia.com) The use of shadow registers caused memory corruption at physical address 0 because the enable bit was not shadowed, and assuming it needed to be set would enable an unconfigured dma block. Most of the register accesses don't need to know the previous state of the registers, and the few places that do need to modify only a few bits in the registers are the same ones that were sometimes incorrectly setting the enable bit. This patch convert tegra_dma_update_hardware to set the entire register, and the other users to read-modify-write, and drops the shadow registers completely. Also fixes missing locking in tegra_dma_allocate_channel Signed-off-by: Colin Cross <ccross@android.com> |
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| .. | ||
| include/mach | ||
| board-harmony-pcie.c | ||
| board-harmony-pinmux.c | ||
| board-harmony.c | ||
| board-harmony.h | ||
| board.h | ||
| clock.c | ||
| clock.h | ||
| common.c | ||
| cpu-tegra.c | ||
| dma.c | ||
| fuse.c | ||
| fuse.h | ||
| gpio-names.h | ||
| gpio.c | ||
| headsmp.S | ||
| hotplug.c | ||
| io.c | ||
| irq.c | ||
| Kconfig | ||
| legacy_irq.c | ||
| localtimer.c | ||
| Makefile | ||
| Makefile.boot | ||
| pcie.c | ||
| pinmux-t2-tables.c | ||
| pinmux.c | ||
| platsmp.c | ||
| powergate.c | ||
| tegra2_clocks.c | ||
| tegra2_dvfs.c | ||
| tegra2_dvfs.h | ||
| timer.c | ||