Ville Syrjälä 56a12a5092 drm/i915: Include display_mmio_offset in sequencer index/data registers ... SR01 needs to be touched to disable VGA on non-UMS setups too. So the sequencer registers need to include the appripriate offset on VLV. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>		2013-01-26 17:32:03 +01:00
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drm	drm/i915: Include display_mmio_offset in sequencer index/data registers	2013-01-26 17:32:03 +01:00
stub	i915: select VIDEO_OUTPUT_CONTROL for ACPI_VIDEO	2011-04-13 09:10:25 +10:00
vga	Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux	2012-12-17 08:26:17 -08:00
Makefile	gpu: Add Intel GMA500(Poulsbo) Stub Driver	2010-10-26 11:00:13 +10:00