forked from Minki/linux
54e269ead6
Patch from Deepak Saxena The expansion bus on the IXP46x NPU can be configured for either 32MiB or 16MiB windows and changing the configuration causes the base address for each chip select for each region to change. Because of this, we cannot hardcode the physical base as we currently do. This patch checks the expansion bus configuration registers at runtime to determine the appropriate window size. Note that this requires that the bootloader already configured the device sizes appropriately, but I feel that is valid assumption to make as the bootloader must configure and access the flash window, the output display (LCD, LEDs, etc) window, and other expansion bus devices. Signed-off-by: Deepak Saxena <dsaxena@plexity.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
136 lines
3.2 KiB
C
136 lines
3.2 KiB
C
/*
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* arch/arm/mach-ixp4xx/nas100d-setup.c
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*
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* NAS 100d board-setup
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*
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* based ixdp425-setup.c:
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* Copyright (C) 2003-2004 MontaVista Software, Inc.
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*
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* Author: Alessandro Zummo <a.zummo@towertech.it>
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* Author: Rod Whitby <rod@whitby.id.au>
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* Maintainers: http://www.nslu2-linux.org/
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*
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*/
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#include <linux/kernel.h>
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#include <linux/serial.h>
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#include <linux/serial_8250.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/flash.h>
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static struct flash_platform_data nas100d_flash_data = {
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.map_name = "cfi_probe",
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.width = 2,
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};
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static struct resource nas100d_flash_resource = {
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.flags = IORESOURCE_MEM,
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};
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static struct platform_device nas100d_flash = {
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.name = "IXP4XX-Flash",
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.id = 0,
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.dev.platform_data = &nas100d_flash_data,
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.num_resources = 1,
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.resource = &nas100d_flash_resource,
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};
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static struct ixp4xx_i2c_pins nas100d_i2c_gpio_pins = {
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.sda_pin = NAS100D_SDA_PIN,
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.scl_pin = NAS100D_SCL_PIN,
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};
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static struct platform_device nas100d_i2c_controller = {
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.name = "IXP4XX-I2C",
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.id = 0,
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.dev.platform_data = &nas100d_i2c_gpio_pins,
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.num_resources = 0,
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};
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static struct resource nas100d_uart_resources[] = {
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{
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.start = IXP4XX_UART1_BASE_PHYS,
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.end = IXP4XX_UART1_BASE_PHYS + 0x0fff,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = IXP4XX_UART2_BASE_PHYS,
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.end = IXP4XX_UART2_BASE_PHYS + 0x0fff,
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.flags = IORESOURCE_MEM,
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}
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};
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static struct plat_serial8250_port nas100d_uart_data[] = {
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{
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.mapbase = IXP4XX_UART1_BASE_PHYS,
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.membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
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.irq = IRQ_IXP4XX_UART1,
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.flags = UPF_BOOT_AUTOCONF,
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.iotype = UPIO_MEM,
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.regshift = 2,
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.uartclk = IXP4XX_UART_XTAL,
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},
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{
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.mapbase = IXP4XX_UART2_BASE_PHYS,
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.membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
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.irq = IRQ_IXP4XX_UART2,
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.flags = UPF_BOOT_AUTOCONF,
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.iotype = UPIO_MEM,
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.regshift = 2,
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.uartclk = IXP4XX_UART_XTAL,
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},
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{ }
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};
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static struct platform_device nas100d_uart = {
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.name = "serial8250",
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.id = PLAT8250_DEV_PLATFORM,
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.dev.platform_data = nas100d_uart_data,
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.num_resources = 2,
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.resource = nas100d_uart_resources,
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};
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static struct platform_device *nas100d_devices[] __initdata = {
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&nas100d_i2c_controller,
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&nas100d_flash,
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&nas100d_uart,
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};
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static void nas100d_power_off(void)
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{
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/* This causes the box to drop the power and go dead. */
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/* enable the pwr cntl gpio */
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gpio_line_config(NAS100D_PO_GPIO, IXP4XX_GPIO_OUT);
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/* do the deed */
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gpio_line_set(NAS100D_PO_GPIO, IXP4XX_GPIO_HIGH);
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}
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static void __init nas100d_init(void)
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{
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ixp4xx_sys_init();
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nas100d_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
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nas100d_flash_resource.end =
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IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1;
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pm_power_off = nas100d_power_off;
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platform_add_devices(nas100d_devices, ARRAY_SIZE(nas100d_devices));
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}
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MACHINE_START(NAS100D, "Iomega NAS 100d")
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/* Maintainer: www.nslu2-linux.org */
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.phys_ram = PHYS_OFFSET,
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.phys_io = IXP4XX_PERIPHERAL_BASE_PHYS,
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.io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xFFFC,
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.boot_params = 0x00000100,
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.map_io = ixp4xx_map_io,
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.init_irq = ixp4xx_init_irq,
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.timer = &ixp4xx_timer,
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.init_machine = nas100d_init,
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MACHINE_END
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