forked from Minki/linux
936f234a96
Add MV88E6XXX_FLAG_PORTSTATE and MV88E6XXX_FLAG_VLANTABLE flags to identify switch models with required 802.1D operations. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
187 lines
5.5 KiB
C
187 lines
5.5 KiB
C
/*
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* net/dsa/mv88e6131.c - Marvell 88e6095/6095f/6131 switch chip support
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* Copyright (c) 2008-2009 Marvell Semiconductor
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/delay.h>
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#include <linux/jiffies.h>
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#include <linux/list.h>
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#include <linux/module.h>
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#include <linux/netdevice.h>
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#include <linux/phy.h>
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#include <net/dsa.h>
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#include "mv88e6xxx.h"
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static const struct mv88e6xxx_info mv88e6131_table[] = {
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{
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.prod_num = PORT_SWITCH_ID_PROD_NUM_6095,
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.family = MV88E6XXX_FAMILY_6095,
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.name = "Marvell 88E6095/88E6095F",
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.num_databases = 256,
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.num_ports = 11,
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.flags = MV88E6XXX_FLAGS_FAMILY_6095,
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}, {
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.prod_num = PORT_SWITCH_ID_PROD_NUM_6085,
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.family = MV88E6XXX_FAMILY_6097,
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.name = "Marvell 88E6085",
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.num_databases = 4096,
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.num_ports = 10,
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.flags = MV88E6XXX_FLAGS_FAMILY_6097,
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}, {
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.prod_num = PORT_SWITCH_ID_PROD_NUM_6131,
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.family = MV88E6XXX_FAMILY_6185,
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.name = "Marvell 88E6131",
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.num_databases = 256,
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.num_ports = 8,
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.flags = MV88E6XXX_FLAGS_FAMILY_6185,
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}, {
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.prod_num = PORT_SWITCH_ID_PROD_NUM_6185,
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.family = MV88E6XXX_FAMILY_6185,
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.name = "Marvell 88E6185",
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.num_databases = 256,
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.num_ports = 10,
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.flags = MV88E6XXX_FLAGS_FAMILY_6185,
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}
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};
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static const char *mv88e6131_drv_probe(struct device *dsa_dev,
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struct device *host_dev, int sw_addr,
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void **priv)
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{
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return mv88e6xxx_drv_probe(dsa_dev, host_dev, sw_addr, priv,
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mv88e6131_table,
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ARRAY_SIZE(mv88e6131_table));
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}
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static int mv88e6131_setup_global(struct dsa_switch *ds)
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{
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struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
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u32 upstream_port = dsa_upstream_port(ds);
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int ret;
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u32 reg;
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ret = mv88e6xxx_setup_global(ds);
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if (ret)
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return ret;
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/* Enable the PHY polling unit, don't discard packets with
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* excessive collisions, use a weighted fair queueing scheme
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* to arbitrate between packet queues, set the maximum frame
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* size to 1632, and mask all interrupt sources.
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*/
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ret = mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_CONTROL,
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GLOBAL_CONTROL_PPU_ENABLE |
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GLOBAL_CONTROL_MAX_FRAME_1632);
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if (ret)
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return ret;
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/* Set the VLAN ethertype to 0x8100. */
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ret = mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_CORE_TAG_TYPE, 0x8100);
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if (ret)
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return ret;
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/* Disable ARP mirroring, and configure the upstream port as
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* the port to which ingress and egress monitor frames are to
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* be sent.
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*/
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reg = upstream_port << GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT |
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upstream_port << GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT |
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GLOBAL_MONITOR_CONTROL_ARP_DISABLED;
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ret = mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_MONITOR_CONTROL, reg);
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if (ret)
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return ret;
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/* Disable cascade port functionality unless this device
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* is used in a cascade configuration, and set the switch's
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* DSA device number.
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*/
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if (ds->dst->pd->nr_chips > 1)
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ret = mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_CONTROL_2,
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GLOBAL_CONTROL_2_MULTIPLE_CASCADE |
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(ds->index & 0x1f));
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else
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ret = mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_CONTROL_2,
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GLOBAL_CONTROL_2_NO_CASCADE |
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(ds->index & 0x1f));
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if (ret)
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return ret;
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/* Force the priority of IGMP/MLD snoop frames and ARP frames
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* to the highest setting.
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*/
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return mv88e6xxx_reg_write(ps, REG_GLOBAL2, GLOBAL2_PRIO_OVERRIDE,
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GLOBAL2_PRIO_OVERRIDE_FORCE_SNOOP |
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7 << GLOBAL2_PRIO_OVERRIDE_SNOOP_SHIFT |
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GLOBAL2_PRIO_OVERRIDE_FORCE_ARP |
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7 << GLOBAL2_PRIO_OVERRIDE_ARP_SHIFT);
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}
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static int mv88e6131_setup(struct dsa_switch *ds)
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{
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struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
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int ret;
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ps->ds = ds;
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ret = mv88e6xxx_setup_common(ps);
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if (ret < 0)
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return ret;
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ret = mv88e6xxx_switch_reset(ps, false);
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if (ret < 0)
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return ret;
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ret = mv88e6131_setup_global(ds);
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if (ret < 0)
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return ret;
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return mv88e6xxx_setup_ports(ds);
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}
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struct dsa_switch_driver mv88e6131_switch_driver = {
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.tag_protocol = DSA_TAG_PROTO_DSA,
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.probe = mv88e6131_drv_probe,
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.setup = mv88e6131_setup,
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.set_addr = mv88e6xxx_set_addr,
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.phy_read = mv88e6xxx_phy_read,
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.phy_write = mv88e6xxx_phy_write,
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.set_eee = mv88e6xxx_set_eee,
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.get_eee = mv88e6xxx_get_eee,
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.get_strings = mv88e6xxx_get_strings,
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.get_ethtool_stats = mv88e6xxx_get_ethtool_stats,
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.get_sset_count = mv88e6xxx_get_sset_count,
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.get_eeprom = mv88e6xxx_get_eeprom,
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.set_eeprom = mv88e6xxx_set_eeprom,
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.get_regs_len = mv88e6xxx_get_regs_len,
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.get_regs = mv88e6xxx_get_regs,
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#ifdef CONFIG_NET_DSA_HWMON
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.get_temp = mv88e6xxx_get_temp,
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.get_temp_limit = mv88e6xxx_get_temp_limit,
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.set_temp_limit = mv88e6xxx_set_temp_limit,
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.get_temp_alarm = mv88e6xxx_get_temp_alarm,
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#endif
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.adjust_link = mv88e6xxx_adjust_link,
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.port_bridge_join = mv88e6xxx_port_bridge_join,
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.port_bridge_leave = mv88e6xxx_port_bridge_leave,
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.port_stp_state_set = mv88e6xxx_port_stp_state_set,
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.port_vlan_filtering = mv88e6xxx_port_vlan_filtering,
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.port_vlan_prepare = mv88e6xxx_port_vlan_prepare,
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.port_vlan_add = mv88e6xxx_port_vlan_add,
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.port_vlan_del = mv88e6xxx_port_vlan_del,
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.port_vlan_dump = mv88e6xxx_port_vlan_dump,
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.port_fdb_prepare = mv88e6xxx_port_fdb_prepare,
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.port_fdb_add = mv88e6xxx_port_fdb_add,
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.port_fdb_del = mv88e6xxx_port_fdb_del,
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.port_fdb_dump = mv88e6xxx_port_fdb_dump,
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};
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MODULE_ALIAS("platform:mv88e6085");
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MODULE_ALIAS("platform:mv88e6095");
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MODULE_ALIAS("platform:mv88e6095f");
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MODULE_ALIAS("platform:mv88e6131");
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