3cd86a58f7
- In-kernel Pointer Authentication support (previously only offered to
user space).
- ARM Activity Monitors (AMU) extension support allowing better CPU
utilisation numbers for the scheduler (frequency invariance).
- Memory hot-remove support for arm64.
- Lots of asm annotations (SYM_*) in preparation for the in-kernel
Branch Target Identification (BTI) support.
- arm64 perf updates: ARMv8.5-PMU 64-bit counters, refactoring the PMU
init callbacks, support for new DT compatibles.
- IPv6 header checksum optimisation.
- Fixes: SDEI (software delegated exception interface) double-lock on
hibernate with shared events.
- Minor clean-ups and refactoring: cpu_ops accessor, cpu_do_switch_mm()
converted to C, cpufeature finalisation helper.
- sys_mremap() comment explaining the asymmetric address untagging
behaviour.
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Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux
Pull arm64 updates from Catalin Marinas:
"The bulk is in-kernel pointer authentication, activity monitors and
lots of asm symbol annotations. I also queued the sys_mremap() patch
commenting the asymmetry in the address untagging.
Summary:
- In-kernel Pointer Authentication support (previously only offered
to user space).
- ARM Activity Monitors (AMU) extension support allowing better CPU
utilisation numbers for the scheduler (frequency invariance).
- Memory hot-remove support for arm64.
- Lots of asm annotations (SYM_*) in preparation for the in-kernel
Branch Target Identification (BTI) support.
- arm64 perf updates: ARMv8.5-PMU 64-bit counters, refactoring the
PMU init callbacks, support for new DT compatibles.
- IPv6 header checksum optimisation.
- Fixes: SDEI (software delegated exception interface) double-lock on
hibernate with shared events.
- Minor clean-ups and refactoring: cpu_ops accessor,
cpu_do_switch_mm() converted to C, cpufeature finalisation helper.
- sys_mremap() comment explaining the asymmetric address untagging
behaviour"
* tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (81 commits)
mm/mremap: Add comment explaining the untagging behaviour of mremap()
arm64: head: Convert install_el2_stub to SYM_INNER_LABEL
arm64: Introduce get_cpu_ops() helper function
arm64: Rename cpu_read_ops() to init_cpu_ops()
arm64: Declare ACPI parking protocol CPU operation if needed
arm64: move kimage_vaddr to .rodata
arm64: use mov_q instead of literal ldr
arm64: Kconfig: verify binutils support for ARM64_PTR_AUTH
lkdtm: arm64: test kernel pointer authentication
arm64: compile the kernel with ptrauth return address signing
kconfig: Add support for 'as-option'
arm64: suspend: restore the kernel ptrauth keys
arm64: __show_regs: strip PAC from lr in printk
arm64: unwind: strip PAC from kernel addresses
arm64: mask PAC bits of __builtin_return_address
arm64: initialize ptrauth keys for kernel booting task
arm64: initialize and switch ptrauth kernel keys
arm64: enable ptrauth earlier
arm64: cpufeature: handle conflicts based on capability
arm64: cpufeature: Move cpu capability helpers inside C file
...
97 lines
2.5 KiB
C
97 lines
2.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2012 ARM Ltd.
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*/
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#ifndef __ASM_MMU_H
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#define __ASM_MMU_H
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#include <asm/cputype.h>
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#define MMCF_AARCH32 0x1 /* mm context flag for AArch32 executables */
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#define USER_ASID_BIT 48
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#define USER_ASID_FLAG (UL(1) << USER_ASID_BIT)
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#define TTBR_ASID_MASK (UL(0xffff) << 48)
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#define BP_HARDEN_EL2_SLOTS 4
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#define __BP_HARDEN_HYP_VECS_SZ (BP_HARDEN_EL2_SLOTS * SZ_2K)
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#ifndef __ASSEMBLY__
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typedef struct {
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atomic64_t id;
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void *vdso;
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unsigned long flags;
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} mm_context_t;
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/*
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* This macro is only used by the TLBI and low-level switch_mm() code,
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* neither of which can race with an ASID change. We therefore don't
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* need to reload the counter using atomic64_read().
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*/
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#define ASID(mm) ((mm)->context.id.counter & 0xffff)
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static inline bool arm64_kernel_unmapped_at_el0(void)
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{
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return cpus_have_const_cap(ARM64_UNMAP_KERNEL_AT_EL0);
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}
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typedef void (*bp_hardening_cb_t)(void);
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struct bp_hardening_data {
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int hyp_vectors_slot;
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bp_hardening_cb_t fn;
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};
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#if (defined(CONFIG_HARDEN_BRANCH_PREDICTOR) || \
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defined(CONFIG_HARDEN_EL2_VECTORS))
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extern char __bp_harden_hyp_vecs[];
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extern atomic_t arm64_el2_vector_last_slot;
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#endif /* CONFIG_HARDEN_BRANCH_PREDICTOR || CONFIG_HARDEN_EL2_VECTORS */
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#ifdef CONFIG_HARDEN_BRANCH_PREDICTOR
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DECLARE_PER_CPU_READ_MOSTLY(struct bp_hardening_data, bp_hardening_data);
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static inline struct bp_hardening_data *arm64_get_bp_hardening_data(void)
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{
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return this_cpu_ptr(&bp_hardening_data);
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}
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static inline void arm64_apply_bp_hardening(void)
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{
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struct bp_hardening_data *d;
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if (!cpus_have_const_cap(ARM64_HARDEN_BRANCH_PREDICTOR))
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return;
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d = arm64_get_bp_hardening_data();
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if (d->fn)
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d->fn();
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}
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#else
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static inline struct bp_hardening_data *arm64_get_bp_hardening_data(void)
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{
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return NULL;
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}
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static inline void arm64_apply_bp_hardening(void) { }
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#endif /* CONFIG_HARDEN_BRANCH_PREDICTOR */
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extern void arm64_memblock_init(void);
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extern void paging_init(void);
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extern void bootmem_init(void);
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extern void __iomem *early_io_map(phys_addr_t phys, unsigned long virt);
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extern void init_mem_pgprot(void);
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extern void create_pgd_mapping(struct mm_struct *mm, phys_addr_t phys,
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unsigned long virt, phys_addr_t size,
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pgprot_t prot, bool page_mappings_only);
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extern void *fixmap_remap_fdt(phys_addr_t dt_phys, int *size, pgprot_t prot);
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extern void mark_linear_text_alias_ro(void);
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extern bool kaslr_requires_kpti(void);
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#define INIT_MM_CONTEXT(name) \
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.pgd = init_pg_dir,
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#endif /* !__ASSEMBLY__ */
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#endif
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