forked from Minki/linux
45dbea5f55
While chasing a regression I noticed we potentially patch the wrong
code in native_patch().
If we do not select the native code sequence, we must use the default
patcher, not fall-through the switch case.
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Alok Kataria <akataria@vmware.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Chris Wright <chrisw@sous-sol.org>
Cc: Jeremy Fitzhardinge <jeremy@goop.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Pan Xinhui <xinhui.pan@linux.vnet.ibm.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Peter Anvin <hpa@zytor.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Rusty Russell <rusty@rustcorp.com.au>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: kernel test robot <xiaolong.ye@intel.com>
Fixes: 3cded41794 ("x86/paravirt: Optimize native pv_lock_ops.vcpu_is_preempted()")
Link: http://lkml.kernel.org/r/20161208154349.270616999@infradead.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
84 lines
2.3 KiB
C
84 lines
2.3 KiB
C
#include <asm/paravirt.h>
|
|
|
|
DEF_NATIVE(pv_irq_ops, irq_disable, "cli");
|
|
DEF_NATIVE(pv_irq_ops, irq_enable, "sti");
|
|
DEF_NATIVE(pv_irq_ops, restore_fl, "push %eax; popf");
|
|
DEF_NATIVE(pv_irq_ops, save_fl, "pushf; pop %eax");
|
|
DEF_NATIVE(pv_cpu_ops, iret, "iret");
|
|
DEF_NATIVE(pv_mmu_ops, read_cr2, "mov %cr2, %eax");
|
|
DEF_NATIVE(pv_mmu_ops, write_cr3, "mov %eax, %cr3");
|
|
DEF_NATIVE(pv_mmu_ops, read_cr3, "mov %cr3, %eax");
|
|
DEF_NATIVE(pv_cpu_ops, clts, "clts");
|
|
|
|
#if defined(CONFIG_PARAVIRT_SPINLOCKS)
|
|
DEF_NATIVE(pv_lock_ops, queued_spin_unlock, "movb $0, (%eax)");
|
|
DEF_NATIVE(pv_lock_ops, vcpu_is_preempted, "xor %eax, %eax");
|
|
#endif
|
|
|
|
unsigned paravirt_patch_ident_32(void *insnbuf, unsigned len)
|
|
{
|
|
/* arg in %eax, return in %eax */
|
|
return 0;
|
|
}
|
|
|
|
unsigned paravirt_patch_ident_64(void *insnbuf, unsigned len)
|
|
{
|
|
/* arg in %edx:%eax, return in %edx:%eax */
|
|
return 0;
|
|
}
|
|
|
|
extern bool pv_is_native_spin_unlock(void);
|
|
extern bool pv_is_native_vcpu_is_preempted(void);
|
|
|
|
unsigned native_patch(u8 type, u16 clobbers, void *ibuf,
|
|
unsigned long addr, unsigned len)
|
|
{
|
|
const unsigned char *start, *end;
|
|
unsigned ret;
|
|
|
|
#define PATCH_SITE(ops, x) \
|
|
case PARAVIRT_PATCH(ops.x): \
|
|
start = start_##ops##_##x; \
|
|
end = end_##ops##_##x; \
|
|
goto patch_site
|
|
switch (type) {
|
|
PATCH_SITE(pv_irq_ops, irq_disable);
|
|
PATCH_SITE(pv_irq_ops, irq_enable);
|
|
PATCH_SITE(pv_irq_ops, restore_fl);
|
|
PATCH_SITE(pv_irq_ops, save_fl);
|
|
PATCH_SITE(pv_cpu_ops, iret);
|
|
PATCH_SITE(pv_mmu_ops, read_cr2);
|
|
PATCH_SITE(pv_mmu_ops, read_cr3);
|
|
PATCH_SITE(pv_mmu_ops, write_cr3);
|
|
PATCH_SITE(pv_cpu_ops, clts);
|
|
#if defined(CONFIG_PARAVIRT_SPINLOCKS)
|
|
case PARAVIRT_PATCH(pv_lock_ops.queued_spin_unlock):
|
|
if (pv_is_native_spin_unlock()) {
|
|
start = start_pv_lock_ops_queued_spin_unlock;
|
|
end = end_pv_lock_ops_queued_spin_unlock;
|
|
goto patch_site;
|
|
}
|
|
goto patch_default;
|
|
|
|
case PARAVIRT_PATCH(pv_lock_ops.vcpu_is_preempted):
|
|
if (pv_is_native_vcpu_is_preempted()) {
|
|
start = start_pv_lock_ops_vcpu_is_preempted;
|
|
end = end_pv_lock_ops_vcpu_is_preempted;
|
|
goto patch_site;
|
|
}
|
|
goto patch_default;
|
|
#endif
|
|
|
|
default:
|
|
patch_default:
|
|
ret = paravirt_patch_default(type, clobbers, ibuf, addr, len);
|
|
break;
|
|
|
|
patch_site:
|
|
ret = paravirt_patch_insns(ibuf, len, start, end);
|
|
break;
|
|
}
|
|
#undef PATCH_SITE
|
|
return ret;
|
|
}
|