forked from Minki/linux
532c3b5817
Commitb2875d4c("IB/mthca: Always fill MTTs from CPU") causes a crash in mthca_write_mtt() with non-memfree HCAs that have their memory hidden (that is, have only two PCI BARs instead of having a third BAR that allows access to the RAM attached to the HCA) on 64-bit architectures. This is because the commit just before,c20e20ab("IB/mthca: Merge MR and FMR space on 64-bit systems") makes dev->mr_table.fmr_mtt_buddy equal to &dev->mr_table.mtt_buddy and hence mthca_write_mtt() tries to write directly into the HCA's MTT table. However, since that table is in the HCA's memory, this is impossible without the PCI BAR that gives access to that memory. This causes a crash because mthca_tavor_write_mtt_seg() basically tries to dereference some offset of a NULL pointer. Fix this by adding a test of MTHCA_FLAG_FMR in mthca_write_mtt() so that we always use the WRITE_MTT firmware command rather than writing directly if FMRs are not enabled. Signed-off-by: Roland Dreier <rolandd@cisco.com>
987 lines
24 KiB
C
987 lines
24 KiB
C
/*
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* Copyright (c) 2004 Topspin Communications. All rights reserved.
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* Copyright (c) 2005 Mellanox Technologies. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* $Id: mthca_mr.c 1349 2004-12-16 21:09:43Z roland $
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*/
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#include <linux/slab.h>
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#include <linux/errno.h>
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#include "mthca_dev.h"
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#include "mthca_cmd.h"
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#include "mthca_memfree.h"
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struct mthca_mtt {
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struct mthca_buddy *buddy;
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int order;
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u32 first_seg;
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};
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/*
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* Must be packed because mtt_seg is 64 bits but only aligned to 32 bits.
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*/
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struct mthca_mpt_entry {
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__be32 flags;
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__be32 page_size;
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__be32 key;
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__be32 pd;
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__be64 start;
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__be64 length;
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__be32 lkey;
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__be32 window_count;
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__be32 window_count_limit;
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__be64 mtt_seg;
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__be32 mtt_sz; /* Arbel only */
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u32 reserved[2];
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} __attribute__((packed));
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#define MTHCA_MPT_FLAG_SW_OWNS (0xfUL << 28)
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#define MTHCA_MPT_FLAG_MIO (1 << 17)
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#define MTHCA_MPT_FLAG_BIND_ENABLE (1 << 15)
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#define MTHCA_MPT_FLAG_PHYSICAL (1 << 9)
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#define MTHCA_MPT_FLAG_REGION (1 << 8)
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#define MTHCA_MTT_FLAG_PRESENT 1
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#define MTHCA_MPT_STATUS_SW 0xF0
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#define MTHCA_MPT_STATUS_HW 0x00
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#define SINAI_FMR_KEY_INC 0x1000000
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/*
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* Buddy allocator for MTT segments (currently not very efficient
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* since it doesn't keep a free list and just searches linearly
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* through the bitmaps)
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*/
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static u32 mthca_buddy_alloc(struct mthca_buddy *buddy, int order)
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{
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int o;
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int m;
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u32 seg;
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spin_lock(&buddy->lock);
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for (o = order; o <= buddy->max_order; ++o) {
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m = 1 << (buddy->max_order - o);
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seg = find_first_bit(buddy->bits[o], m);
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if (seg < m)
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goto found;
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}
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spin_unlock(&buddy->lock);
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return -1;
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found:
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clear_bit(seg, buddy->bits[o]);
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while (o > order) {
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--o;
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seg <<= 1;
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set_bit(seg ^ 1, buddy->bits[o]);
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}
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spin_unlock(&buddy->lock);
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seg <<= order;
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return seg;
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}
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static void mthca_buddy_free(struct mthca_buddy *buddy, u32 seg, int order)
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{
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seg >>= order;
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spin_lock(&buddy->lock);
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while (test_bit(seg ^ 1, buddy->bits[order])) {
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clear_bit(seg ^ 1, buddy->bits[order]);
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seg >>= 1;
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++order;
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}
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set_bit(seg, buddy->bits[order]);
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spin_unlock(&buddy->lock);
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}
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static int mthca_buddy_init(struct mthca_buddy *buddy, int max_order)
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{
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int i, s;
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buddy->max_order = max_order;
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spin_lock_init(&buddy->lock);
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buddy->bits = kzalloc((buddy->max_order + 1) * sizeof (long *),
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GFP_KERNEL);
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if (!buddy->bits)
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goto err_out;
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for (i = 0; i <= buddy->max_order; ++i) {
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s = BITS_TO_LONGS(1 << (buddy->max_order - i));
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buddy->bits[i] = kmalloc(s * sizeof (long), GFP_KERNEL);
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if (!buddy->bits[i])
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goto err_out_free;
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bitmap_zero(buddy->bits[i],
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1 << (buddy->max_order - i));
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}
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set_bit(0, buddy->bits[buddy->max_order]);
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return 0;
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err_out_free:
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for (i = 0; i <= buddy->max_order; ++i)
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kfree(buddy->bits[i]);
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kfree(buddy->bits);
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err_out:
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return -ENOMEM;
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}
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static void mthca_buddy_cleanup(struct mthca_buddy *buddy)
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{
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int i;
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for (i = 0; i <= buddy->max_order; ++i)
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kfree(buddy->bits[i]);
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kfree(buddy->bits);
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}
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static u32 mthca_alloc_mtt_range(struct mthca_dev *dev, int order,
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struct mthca_buddy *buddy)
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{
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u32 seg = mthca_buddy_alloc(buddy, order);
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if (seg == -1)
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return -1;
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if (mthca_is_memfree(dev))
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if (mthca_table_get_range(dev, dev->mr_table.mtt_table, seg,
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seg + (1 << order) - 1)) {
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mthca_buddy_free(buddy, seg, order);
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seg = -1;
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}
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return seg;
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}
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static struct mthca_mtt *__mthca_alloc_mtt(struct mthca_dev *dev, int size,
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struct mthca_buddy *buddy)
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{
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struct mthca_mtt *mtt;
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int i;
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if (size <= 0)
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return ERR_PTR(-EINVAL);
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mtt = kmalloc(sizeof *mtt, GFP_KERNEL);
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if (!mtt)
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return ERR_PTR(-ENOMEM);
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mtt->buddy = buddy;
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mtt->order = 0;
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for (i = MTHCA_MTT_SEG_SIZE / 8; i < size; i <<= 1)
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++mtt->order;
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mtt->first_seg = mthca_alloc_mtt_range(dev, mtt->order, buddy);
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if (mtt->first_seg == -1) {
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kfree(mtt);
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return ERR_PTR(-ENOMEM);
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}
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return mtt;
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}
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struct mthca_mtt *mthca_alloc_mtt(struct mthca_dev *dev, int size)
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{
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return __mthca_alloc_mtt(dev, size, &dev->mr_table.mtt_buddy);
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}
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void mthca_free_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt)
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{
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if (!mtt)
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return;
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mthca_buddy_free(mtt->buddy, mtt->first_seg, mtt->order);
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mthca_table_put_range(dev, dev->mr_table.mtt_table,
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mtt->first_seg,
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mtt->first_seg + (1 << mtt->order) - 1);
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kfree(mtt);
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}
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static int __mthca_write_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt,
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int start_index, u64 *buffer_list, int list_len)
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{
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struct mthca_mailbox *mailbox;
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__be64 *mtt_entry;
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int err = 0;
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u8 status;
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int i;
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mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL);
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if (IS_ERR(mailbox))
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return PTR_ERR(mailbox);
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mtt_entry = mailbox->buf;
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while (list_len > 0) {
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mtt_entry[0] = cpu_to_be64(dev->mr_table.mtt_base +
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mtt->first_seg * MTHCA_MTT_SEG_SIZE +
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start_index * 8);
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mtt_entry[1] = 0;
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for (i = 0; i < list_len && i < MTHCA_MAILBOX_SIZE / 8 - 2; ++i)
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mtt_entry[i + 2] = cpu_to_be64(buffer_list[i] |
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MTHCA_MTT_FLAG_PRESENT);
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/*
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* If we have an odd number of entries to write, add
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* one more dummy entry for firmware efficiency.
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*/
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if (i & 1)
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mtt_entry[i + 2] = 0;
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err = mthca_WRITE_MTT(dev, mailbox, (i + 1) & ~1, &status);
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if (err) {
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mthca_warn(dev, "WRITE_MTT failed (%d)\n", err);
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goto out;
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}
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if (status) {
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mthca_warn(dev, "WRITE_MTT returned status 0x%02x\n",
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status);
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err = -EINVAL;
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goto out;
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}
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list_len -= i;
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start_index += i;
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buffer_list += i;
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}
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out:
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mthca_free_mailbox(dev, mailbox);
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return err;
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}
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int mthca_write_mtt_size(struct mthca_dev *dev)
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{
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if (dev->mr_table.fmr_mtt_buddy != &dev->mr_table.mtt_buddy ||
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!(dev->mthca_flags & MTHCA_FLAG_FMR))
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/*
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* Be friendly to WRITE_MTT command
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* and leave two empty slots for the
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* index and reserved fields of the
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* mailbox.
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*/
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return PAGE_SIZE / sizeof (u64) - 2;
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/* For Arbel, all MTTs must fit in the same page. */
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return mthca_is_memfree(dev) ? (PAGE_SIZE / sizeof (u64)) : 0x7ffffff;
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}
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static void mthca_tavor_write_mtt_seg(struct mthca_dev *dev,
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struct mthca_mtt *mtt, int start_index,
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u64 *buffer_list, int list_len)
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{
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u64 __iomem *mtts;
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int i;
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mtts = dev->mr_table.tavor_fmr.mtt_base + mtt->first_seg * MTHCA_MTT_SEG_SIZE +
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start_index * sizeof (u64);
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for (i = 0; i < list_len; ++i)
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mthca_write64_raw(cpu_to_be64(buffer_list[i] | MTHCA_MTT_FLAG_PRESENT),
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mtts + i);
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}
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static void mthca_arbel_write_mtt_seg(struct mthca_dev *dev,
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struct mthca_mtt *mtt, int start_index,
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u64 *buffer_list, int list_len)
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{
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__be64 *mtts;
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dma_addr_t dma_handle;
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int i;
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int s = start_index * sizeof (u64);
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/* For Arbel, all MTTs must fit in the same page. */
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BUG_ON(s / PAGE_SIZE != (s + list_len * sizeof(u64) - 1) / PAGE_SIZE);
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/* Require full segments */
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BUG_ON(s % MTHCA_MTT_SEG_SIZE);
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mtts = mthca_table_find(dev->mr_table.mtt_table, mtt->first_seg +
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s / MTHCA_MTT_SEG_SIZE, &dma_handle);
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BUG_ON(!mtts);
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for (i = 0; i < list_len; ++i)
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mtts[i] = cpu_to_be64(buffer_list[i] | MTHCA_MTT_FLAG_PRESENT);
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dma_sync_single(&dev->pdev->dev, dma_handle, list_len * sizeof (u64), DMA_TO_DEVICE);
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}
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int mthca_write_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt,
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int start_index, u64 *buffer_list, int list_len)
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{
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int size = mthca_write_mtt_size(dev);
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int chunk;
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if (dev->mr_table.fmr_mtt_buddy != &dev->mr_table.mtt_buddy ||
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!(dev->mthca_flags & MTHCA_FLAG_FMR))
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return __mthca_write_mtt(dev, mtt, start_index, buffer_list, list_len);
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while (list_len > 0) {
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chunk = min(size, list_len);
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if (mthca_is_memfree(dev))
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mthca_arbel_write_mtt_seg(dev, mtt, start_index,
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buffer_list, chunk);
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else
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mthca_tavor_write_mtt_seg(dev, mtt, start_index,
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buffer_list, chunk);
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list_len -= chunk;
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start_index += chunk;
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buffer_list += chunk;
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}
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return 0;
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}
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static inline u32 tavor_hw_index_to_key(u32 ind)
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{
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return ind;
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}
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static inline u32 tavor_key_to_hw_index(u32 key)
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{
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return key;
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}
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static inline u32 arbel_hw_index_to_key(u32 ind)
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{
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return (ind >> 24) | (ind << 8);
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}
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static inline u32 arbel_key_to_hw_index(u32 key)
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{
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return (key << 24) | (key >> 8);
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}
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static inline u32 hw_index_to_key(struct mthca_dev *dev, u32 ind)
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{
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if (mthca_is_memfree(dev))
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return arbel_hw_index_to_key(ind);
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else
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return tavor_hw_index_to_key(ind);
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}
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static inline u32 key_to_hw_index(struct mthca_dev *dev, u32 key)
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{
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if (mthca_is_memfree(dev))
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return arbel_key_to_hw_index(key);
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else
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return tavor_key_to_hw_index(key);
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}
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static inline u32 adjust_key(struct mthca_dev *dev, u32 key)
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{
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if (dev->mthca_flags & MTHCA_FLAG_SINAI_OPT)
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return ((key << 20) & 0x800000) | (key & 0x7fffff);
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else
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return key;
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}
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int mthca_mr_alloc(struct mthca_dev *dev, u32 pd, int buffer_size_shift,
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u64 iova, u64 total_size, u32 access, struct mthca_mr *mr)
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{
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struct mthca_mailbox *mailbox;
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struct mthca_mpt_entry *mpt_entry;
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u32 key;
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int i;
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int err;
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u8 status;
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WARN_ON(buffer_size_shift >= 32);
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key = mthca_alloc(&dev->mr_table.mpt_alloc);
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if (key == -1)
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return -ENOMEM;
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key = adjust_key(dev, key);
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mr->ibmr.rkey = mr->ibmr.lkey = hw_index_to_key(dev, key);
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if (mthca_is_memfree(dev)) {
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err = mthca_table_get(dev, dev->mr_table.mpt_table, key);
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if (err)
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goto err_out_mpt_free;
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}
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mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL);
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if (IS_ERR(mailbox)) {
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err = PTR_ERR(mailbox);
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goto err_out_table;
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}
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mpt_entry = mailbox->buf;
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mpt_entry->flags = cpu_to_be32(MTHCA_MPT_FLAG_SW_OWNS |
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MTHCA_MPT_FLAG_MIO |
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MTHCA_MPT_FLAG_REGION |
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access);
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if (!mr->mtt)
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mpt_entry->flags |= cpu_to_be32(MTHCA_MPT_FLAG_PHYSICAL);
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mpt_entry->page_size = cpu_to_be32(buffer_size_shift - 12);
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mpt_entry->key = cpu_to_be32(key);
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mpt_entry->pd = cpu_to_be32(pd);
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mpt_entry->start = cpu_to_be64(iova);
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mpt_entry->length = cpu_to_be64(total_size);
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memset(&mpt_entry->lkey, 0,
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sizeof *mpt_entry - offsetof(struct mthca_mpt_entry, lkey));
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if (mr->mtt)
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mpt_entry->mtt_seg =
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cpu_to_be64(dev->mr_table.mtt_base +
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mr->mtt->first_seg * MTHCA_MTT_SEG_SIZE);
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if (0) {
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mthca_dbg(dev, "Dumping MPT entry %08x:\n", mr->ibmr.lkey);
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for (i = 0; i < sizeof (struct mthca_mpt_entry) / 4; ++i) {
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if (i % 4 == 0)
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printk("[%02x] ", i * 4);
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printk(" %08x", be32_to_cpu(((__be32 *) mpt_entry)[i]));
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if ((i + 1) % 4 == 0)
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printk("\n");
|
|
}
|
|
}
|
|
|
|
err = mthca_SW2HW_MPT(dev, mailbox,
|
|
key & (dev->limits.num_mpts - 1),
|
|
&status);
|
|
if (err) {
|
|
mthca_warn(dev, "SW2HW_MPT failed (%d)\n", err);
|
|
goto err_out_mailbox;
|
|
} else if (status) {
|
|
mthca_warn(dev, "SW2HW_MPT returned status 0x%02x\n",
|
|
status);
|
|
err = -EINVAL;
|
|
goto err_out_mailbox;
|
|
}
|
|
|
|
mthca_free_mailbox(dev, mailbox);
|
|
return err;
|
|
|
|
err_out_mailbox:
|
|
mthca_free_mailbox(dev, mailbox);
|
|
|
|
err_out_table:
|
|
mthca_table_put(dev, dev->mr_table.mpt_table, key);
|
|
|
|
err_out_mpt_free:
|
|
mthca_free(&dev->mr_table.mpt_alloc, key);
|
|
return err;
|
|
}
|
|
|
|
int mthca_mr_alloc_notrans(struct mthca_dev *dev, u32 pd,
|
|
u32 access, struct mthca_mr *mr)
|
|
{
|
|
mr->mtt = NULL;
|
|
return mthca_mr_alloc(dev, pd, 12, 0, ~0ULL, access, mr);
|
|
}
|
|
|
|
int mthca_mr_alloc_phys(struct mthca_dev *dev, u32 pd,
|
|
u64 *buffer_list, int buffer_size_shift,
|
|
int list_len, u64 iova, u64 total_size,
|
|
u32 access, struct mthca_mr *mr)
|
|
{
|
|
int err;
|
|
|
|
mr->mtt = mthca_alloc_mtt(dev, list_len);
|
|
if (IS_ERR(mr->mtt))
|
|
return PTR_ERR(mr->mtt);
|
|
|
|
err = mthca_write_mtt(dev, mr->mtt, 0, buffer_list, list_len);
|
|
if (err) {
|
|
mthca_free_mtt(dev, mr->mtt);
|
|
return err;
|
|
}
|
|
|
|
err = mthca_mr_alloc(dev, pd, buffer_size_shift, iova,
|
|
total_size, access, mr);
|
|
if (err)
|
|
mthca_free_mtt(dev, mr->mtt);
|
|
|
|
return err;
|
|
}
|
|
|
|
/* Free mr or fmr */
|
|
static void mthca_free_region(struct mthca_dev *dev, u32 lkey)
|
|
{
|
|
mthca_table_put(dev, dev->mr_table.mpt_table,
|
|
key_to_hw_index(dev, lkey));
|
|
|
|
mthca_free(&dev->mr_table.mpt_alloc, key_to_hw_index(dev, lkey));
|
|
}
|
|
|
|
void mthca_free_mr(struct mthca_dev *dev, struct mthca_mr *mr)
|
|
{
|
|
int err;
|
|
u8 status;
|
|
|
|
err = mthca_HW2SW_MPT(dev, NULL,
|
|
key_to_hw_index(dev, mr->ibmr.lkey) &
|
|
(dev->limits.num_mpts - 1),
|
|
&status);
|
|
if (err)
|
|
mthca_warn(dev, "HW2SW_MPT failed (%d)\n", err);
|
|
else if (status)
|
|
mthca_warn(dev, "HW2SW_MPT returned status 0x%02x\n",
|
|
status);
|
|
|
|
mthca_free_region(dev, mr->ibmr.lkey);
|
|
mthca_free_mtt(dev, mr->mtt);
|
|
}
|
|
|
|
int mthca_fmr_alloc(struct mthca_dev *dev, u32 pd,
|
|
u32 access, struct mthca_fmr *mr)
|
|
{
|
|
struct mthca_mpt_entry *mpt_entry;
|
|
struct mthca_mailbox *mailbox;
|
|
u64 mtt_seg;
|
|
u32 key, idx;
|
|
u8 status;
|
|
int list_len = mr->attr.max_pages;
|
|
int err = -ENOMEM;
|
|
int i;
|
|
|
|
if (mr->attr.page_shift < 12 || mr->attr.page_shift >= 32)
|
|
return -EINVAL;
|
|
|
|
/* For Arbel, all MTTs must fit in the same page. */
|
|
if (mthca_is_memfree(dev) &&
|
|
mr->attr.max_pages * sizeof *mr->mem.arbel.mtts > PAGE_SIZE)
|
|
return -EINVAL;
|
|
|
|
mr->maps = 0;
|
|
|
|
key = mthca_alloc(&dev->mr_table.mpt_alloc);
|
|
if (key == -1)
|
|
return -ENOMEM;
|
|
key = adjust_key(dev, key);
|
|
|
|
idx = key & (dev->limits.num_mpts - 1);
|
|
mr->ibmr.rkey = mr->ibmr.lkey = hw_index_to_key(dev, key);
|
|
|
|
if (mthca_is_memfree(dev)) {
|
|
err = mthca_table_get(dev, dev->mr_table.mpt_table, key);
|
|
if (err)
|
|
goto err_out_mpt_free;
|
|
|
|
mr->mem.arbel.mpt = mthca_table_find(dev->mr_table.mpt_table, key, NULL);
|
|
BUG_ON(!mr->mem.arbel.mpt);
|
|
} else
|
|
mr->mem.tavor.mpt = dev->mr_table.tavor_fmr.mpt_base +
|
|
sizeof *(mr->mem.tavor.mpt) * idx;
|
|
|
|
mr->mtt = __mthca_alloc_mtt(dev, list_len, dev->mr_table.fmr_mtt_buddy);
|
|
if (IS_ERR(mr->mtt))
|
|
goto err_out_table;
|
|
|
|
mtt_seg = mr->mtt->first_seg * MTHCA_MTT_SEG_SIZE;
|
|
|
|
if (mthca_is_memfree(dev)) {
|
|
mr->mem.arbel.mtts = mthca_table_find(dev->mr_table.mtt_table,
|
|
mr->mtt->first_seg,
|
|
&mr->mem.arbel.dma_handle);
|
|
BUG_ON(!mr->mem.arbel.mtts);
|
|
} else
|
|
mr->mem.tavor.mtts = dev->mr_table.tavor_fmr.mtt_base + mtt_seg;
|
|
|
|
mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL);
|
|
if (IS_ERR(mailbox))
|
|
goto err_out_free_mtt;
|
|
|
|
mpt_entry = mailbox->buf;
|
|
|
|
mpt_entry->flags = cpu_to_be32(MTHCA_MPT_FLAG_SW_OWNS |
|
|
MTHCA_MPT_FLAG_MIO |
|
|
MTHCA_MPT_FLAG_REGION |
|
|
access);
|
|
|
|
mpt_entry->page_size = cpu_to_be32(mr->attr.page_shift - 12);
|
|
mpt_entry->key = cpu_to_be32(key);
|
|
mpt_entry->pd = cpu_to_be32(pd);
|
|
memset(&mpt_entry->start, 0,
|
|
sizeof *mpt_entry - offsetof(struct mthca_mpt_entry, start));
|
|
mpt_entry->mtt_seg = cpu_to_be64(dev->mr_table.mtt_base + mtt_seg);
|
|
|
|
if (0) {
|
|
mthca_dbg(dev, "Dumping MPT entry %08x:\n", mr->ibmr.lkey);
|
|
for (i = 0; i < sizeof (struct mthca_mpt_entry) / 4; ++i) {
|
|
if (i % 4 == 0)
|
|
printk("[%02x] ", i * 4);
|
|
printk(" %08x", be32_to_cpu(((__be32 *) mpt_entry)[i]));
|
|
if ((i + 1) % 4 == 0)
|
|
printk("\n");
|
|
}
|
|
}
|
|
|
|
err = mthca_SW2HW_MPT(dev, mailbox,
|
|
key & (dev->limits.num_mpts - 1),
|
|
&status);
|
|
if (err) {
|
|
mthca_warn(dev, "SW2HW_MPT failed (%d)\n", err);
|
|
goto err_out_mailbox_free;
|
|
}
|
|
if (status) {
|
|
mthca_warn(dev, "SW2HW_MPT returned status 0x%02x\n",
|
|
status);
|
|
err = -EINVAL;
|
|
goto err_out_mailbox_free;
|
|
}
|
|
|
|
mthca_free_mailbox(dev, mailbox);
|
|
return 0;
|
|
|
|
err_out_mailbox_free:
|
|
mthca_free_mailbox(dev, mailbox);
|
|
|
|
err_out_free_mtt:
|
|
mthca_free_mtt(dev, mr->mtt);
|
|
|
|
err_out_table:
|
|
mthca_table_put(dev, dev->mr_table.mpt_table, key);
|
|
|
|
err_out_mpt_free:
|
|
mthca_free(&dev->mr_table.mpt_alloc, mr->ibmr.lkey);
|
|
return err;
|
|
}
|
|
|
|
int mthca_free_fmr(struct mthca_dev *dev, struct mthca_fmr *fmr)
|
|
{
|
|
if (fmr->maps)
|
|
return -EBUSY;
|
|
|
|
mthca_free_region(dev, fmr->ibmr.lkey);
|
|
mthca_free_mtt(dev, fmr->mtt);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static inline int mthca_check_fmr(struct mthca_fmr *fmr, u64 *page_list,
|
|
int list_len, u64 iova)
|
|
{
|
|
int i, page_mask;
|
|
|
|
if (list_len > fmr->attr.max_pages)
|
|
return -EINVAL;
|
|
|
|
page_mask = (1 << fmr->attr.page_shift) - 1;
|
|
|
|
/* We are getting page lists, so va must be page aligned. */
|
|
if (iova & page_mask)
|
|
return -EINVAL;
|
|
|
|
/* Trust the user not to pass misaligned data in page_list */
|
|
if (0)
|
|
for (i = 0; i < list_len; ++i) {
|
|
if (page_list[i] & ~page_mask)
|
|
return -EINVAL;
|
|
}
|
|
|
|
if (fmr->maps >= fmr->attr.max_maps)
|
|
return -EINVAL;
|
|
|
|
return 0;
|
|
}
|
|
|
|
|
|
int mthca_tavor_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list,
|
|
int list_len, u64 iova)
|
|
{
|
|
struct mthca_fmr *fmr = to_mfmr(ibfmr);
|
|
struct mthca_dev *dev = to_mdev(ibfmr->device);
|
|
struct mthca_mpt_entry mpt_entry;
|
|
u32 key;
|
|
int i, err;
|
|
|
|
err = mthca_check_fmr(fmr, page_list, list_len, iova);
|
|
if (err)
|
|
return err;
|
|
|
|
++fmr->maps;
|
|
|
|
key = tavor_key_to_hw_index(fmr->ibmr.lkey);
|
|
key += dev->limits.num_mpts;
|
|
fmr->ibmr.lkey = fmr->ibmr.rkey = tavor_hw_index_to_key(key);
|
|
|
|
writeb(MTHCA_MPT_STATUS_SW, fmr->mem.tavor.mpt);
|
|
|
|
for (i = 0; i < list_len; ++i) {
|
|
__be64 mtt_entry = cpu_to_be64(page_list[i] |
|
|
MTHCA_MTT_FLAG_PRESENT);
|
|
mthca_write64_raw(mtt_entry, fmr->mem.tavor.mtts + i);
|
|
}
|
|
|
|
mpt_entry.lkey = cpu_to_be32(key);
|
|
mpt_entry.length = cpu_to_be64(list_len * (1ull << fmr->attr.page_shift));
|
|
mpt_entry.start = cpu_to_be64(iova);
|
|
|
|
__raw_writel((__force u32) mpt_entry.lkey, &fmr->mem.tavor.mpt->key);
|
|
memcpy_toio(&fmr->mem.tavor.mpt->start, &mpt_entry.start,
|
|
offsetof(struct mthca_mpt_entry, window_count) -
|
|
offsetof(struct mthca_mpt_entry, start));
|
|
|
|
writeb(MTHCA_MPT_STATUS_HW, fmr->mem.tavor.mpt);
|
|
|
|
return 0;
|
|
}
|
|
|
|
int mthca_arbel_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list,
|
|
int list_len, u64 iova)
|
|
{
|
|
struct mthca_fmr *fmr = to_mfmr(ibfmr);
|
|
struct mthca_dev *dev = to_mdev(ibfmr->device);
|
|
u32 key;
|
|
int i, err;
|
|
|
|
err = mthca_check_fmr(fmr, page_list, list_len, iova);
|
|
if (err)
|
|
return err;
|
|
|
|
++fmr->maps;
|
|
|
|
key = arbel_key_to_hw_index(fmr->ibmr.lkey);
|
|
if (dev->mthca_flags & MTHCA_FLAG_SINAI_OPT)
|
|
key += SINAI_FMR_KEY_INC;
|
|
else
|
|
key += dev->limits.num_mpts;
|
|
fmr->ibmr.lkey = fmr->ibmr.rkey = arbel_hw_index_to_key(key);
|
|
|
|
*(u8 *) fmr->mem.arbel.mpt = MTHCA_MPT_STATUS_SW;
|
|
|
|
wmb();
|
|
|
|
for (i = 0; i < list_len; ++i)
|
|
fmr->mem.arbel.mtts[i] = cpu_to_be64(page_list[i] |
|
|
MTHCA_MTT_FLAG_PRESENT);
|
|
|
|
dma_sync_single(&dev->pdev->dev, fmr->mem.arbel.dma_handle,
|
|
list_len * sizeof(u64), DMA_TO_DEVICE);
|
|
|
|
fmr->mem.arbel.mpt->key = cpu_to_be32(key);
|
|
fmr->mem.arbel.mpt->lkey = cpu_to_be32(key);
|
|
fmr->mem.arbel.mpt->length = cpu_to_be64(list_len * (1ull << fmr->attr.page_shift));
|
|
fmr->mem.arbel.mpt->start = cpu_to_be64(iova);
|
|
|
|
wmb();
|
|
|
|
*(u8 *) fmr->mem.arbel.mpt = MTHCA_MPT_STATUS_HW;
|
|
|
|
wmb();
|
|
|
|
return 0;
|
|
}
|
|
|
|
void mthca_tavor_fmr_unmap(struct mthca_dev *dev, struct mthca_fmr *fmr)
|
|
{
|
|
u32 key;
|
|
|
|
if (!fmr->maps)
|
|
return;
|
|
|
|
key = tavor_key_to_hw_index(fmr->ibmr.lkey);
|
|
key &= dev->limits.num_mpts - 1;
|
|
fmr->ibmr.lkey = fmr->ibmr.rkey = tavor_hw_index_to_key(key);
|
|
|
|
fmr->maps = 0;
|
|
|
|
writeb(MTHCA_MPT_STATUS_SW, fmr->mem.tavor.mpt);
|
|
}
|
|
|
|
void mthca_arbel_fmr_unmap(struct mthca_dev *dev, struct mthca_fmr *fmr)
|
|
{
|
|
u32 key;
|
|
|
|
if (!fmr->maps)
|
|
return;
|
|
|
|
key = arbel_key_to_hw_index(fmr->ibmr.lkey);
|
|
key &= dev->limits.num_mpts - 1;
|
|
key = adjust_key(dev, key);
|
|
fmr->ibmr.lkey = fmr->ibmr.rkey = arbel_hw_index_to_key(key);
|
|
|
|
fmr->maps = 0;
|
|
|
|
*(u8 *) fmr->mem.arbel.mpt = MTHCA_MPT_STATUS_SW;
|
|
}
|
|
|
|
int mthca_init_mr_table(struct mthca_dev *dev)
|
|
{
|
|
unsigned long addr;
|
|
int mpts, mtts, err, i;
|
|
|
|
err = mthca_alloc_init(&dev->mr_table.mpt_alloc,
|
|
dev->limits.num_mpts,
|
|
~0, dev->limits.reserved_mrws);
|
|
if (err)
|
|
return err;
|
|
|
|
if (!mthca_is_memfree(dev) &&
|
|
(dev->mthca_flags & MTHCA_FLAG_DDR_HIDDEN))
|
|
dev->limits.fmr_reserved_mtts = 0;
|
|
else
|
|
dev->mthca_flags |= MTHCA_FLAG_FMR;
|
|
|
|
if (dev->mthca_flags & MTHCA_FLAG_SINAI_OPT)
|
|
mthca_dbg(dev, "Memory key throughput optimization activated.\n");
|
|
|
|
err = mthca_buddy_init(&dev->mr_table.mtt_buddy,
|
|
fls(dev->limits.num_mtt_segs - 1));
|
|
|
|
if (err)
|
|
goto err_mtt_buddy;
|
|
|
|
dev->mr_table.tavor_fmr.mpt_base = NULL;
|
|
dev->mr_table.tavor_fmr.mtt_base = NULL;
|
|
|
|
if (dev->limits.fmr_reserved_mtts) {
|
|
i = fls(dev->limits.fmr_reserved_mtts - 1);
|
|
|
|
if (i >= 31) {
|
|
mthca_warn(dev, "Unable to reserve 2^31 FMR MTTs.\n");
|
|
err = -EINVAL;
|
|
goto err_fmr_mpt;
|
|
}
|
|
mpts = mtts = 1 << i;
|
|
} else {
|
|
mtts = dev->limits.num_mtt_segs;
|
|
mpts = dev->limits.num_mpts;
|
|
}
|
|
|
|
if (!mthca_is_memfree(dev) &&
|
|
(dev->mthca_flags & MTHCA_FLAG_FMR)) {
|
|
|
|
addr = pci_resource_start(dev->pdev, 4) +
|
|
((pci_resource_len(dev->pdev, 4) - 1) &
|
|
dev->mr_table.mpt_base);
|
|
|
|
dev->mr_table.tavor_fmr.mpt_base =
|
|
ioremap(addr, mpts * sizeof(struct mthca_mpt_entry));
|
|
|
|
if (!dev->mr_table.tavor_fmr.mpt_base) {
|
|
mthca_warn(dev, "MPT ioremap for FMR failed.\n");
|
|
err = -ENOMEM;
|
|
goto err_fmr_mpt;
|
|
}
|
|
|
|
addr = pci_resource_start(dev->pdev, 4) +
|
|
((pci_resource_len(dev->pdev, 4) - 1) &
|
|
dev->mr_table.mtt_base);
|
|
|
|
dev->mr_table.tavor_fmr.mtt_base =
|
|
ioremap(addr, mtts * MTHCA_MTT_SEG_SIZE);
|
|
if (!dev->mr_table.tavor_fmr.mtt_base) {
|
|
mthca_warn(dev, "MTT ioremap for FMR failed.\n");
|
|
err = -ENOMEM;
|
|
goto err_fmr_mtt;
|
|
}
|
|
}
|
|
|
|
if (dev->limits.fmr_reserved_mtts) {
|
|
err = mthca_buddy_init(&dev->mr_table.tavor_fmr.mtt_buddy, fls(mtts - 1));
|
|
if (err)
|
|
goto err_fmr_mtt_buddy;
|
|
|
|
/* Prevent regular MRs from using FMR keys */
|
|
err = mthca_buddy_alloc(&dev->mr_table.mtt_buddy, fls(mtts - 1));
|
|
if (err)
|
|
goto err_reserve_fmr;
|
|
|
|
dev->mr_table.fmr_mtt_buddy =
|
|
&dev->mr_table.tavor_fmr.mtt_buddy;
|
|
} else
|
|
dev->mr_table.fmr_mtt_buddy = &dev->mr_table.mtt_buddy;
|
|
|
|
/* FMR table is always the first, take reserved MTTs out of there */
|
|
if (dev->limits.reserved_mtts) {
|
|
i = fls(dev->limits.reserved_mtts - 1);
|
|
|
|
if (mthca_alloc_mtt_range(dev, i,
|
|
dev->mr_table.fmr_mtt_buddy) == -1) {
|
|
mthca_warn(dev, "MTT table of order %d is too small.\n",
|
|
dev->mr_table.fmr_mtt_buddy->max_order);
|
|
err = -ENOMEM;
|
|
goto err_reserve_mtts;
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
|
|
err_reserve_mtts:
|
|
err_reserve_fmr:
|
|
if (dev->limits.fmr_reserved_mtts)
|
|
mthca_buddy_cleanup(&dev->mr_table.tavor_fmr.mtt_buddy);
|
|
|
|
err_fmr_mtt_buddy:
|
|
if (dev->mr_table.tavor_fmr.mtt_base)
|
|
iounmap(dev->mr_table.tavor_fmr.mtt_base);
|
|
|
|
err_fmr_mtt:
|
|
if (dev->mr_table.tavor_fmr.mpt_base)
|
|
iounmap(dev->mr_table.tavor_fmr.mpt_base);
|
|
|
|
err_fmr_mpt:
|
|
mthca_buddy_cleanup(&dev->mr_table.mtt_buddy);
|
|
|
|
err_mtt_buddy:
|
|
mthca_alloc_cleanup(&dev->mr_table.mpt_alloc);
|
|
|
|
return err;
|
|
}
|
|
|
|
void mthca_cleanup_mr_table(struct mthca_dev *dev)
|
|
{
|
|
/* XXX check if any MRs are still allocated? */
|
|
if (dev->limits.fmr_reserved_mtts)
|
|
mthca_buddy_cleanup(&dev->mr_table.tavor_fmr.mtt_buddy);
|
|
|
|
mthca_buddy_cleanup(&dev->mr_table.mtt_buddy);
|
|
|
|
if (dev->mr_table.tavor_fmr.mtt_base)
|
|
iounmap(dev->mr_table.tavor_fmr.mtt_base);
|
|
if (dev->mr_table.tavor_fmr.mpt_base)
|
|
iounmap(dev->mr_table.tavor_fmr.mpt_base);
|
|
|
|
mthca_alloc_cleanup(&dev->mr_table.mpt_alloc);
|
|
}
|