3cf2954341
Broadcom BCM63xx DSL SoCs utilize BMIPS CPUs, and as such are required to perform a read-ahead cache flush after a DMA transfer. Utilize asm/bmips.h to provide a plat_post_dma_flush_hook, and mach-generic/dma-coherence.h for everything else. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Cc: linux-mips@linux-mips.org Cc: cernekee@gmail.com Cc: jogo@openwrt.org Patchwork: https://patchwork.linux-mips.org/patch/9726/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
11 lines
254 B
C
11 lines
254 B
C
#ifndef __ASM_MACH_BCM63XX_DMA_COHERENCE_H
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#define __ASM_MACH_BCM63XX_DMA_COHERENCE_H
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#include <asm/bmips.h>
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#define plat_post_dma_flush bmips_post_dma_flush
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#include <asm/mach-generic/dma-coherence.h>
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#endif /* __ASM_MACH_BCM63XX_DMA_COHERENCE_H */
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