f38b0dd63f
The OMAP clock driver now supports DPLL clock type. This patch also adds support for DT DPLL nodes. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
22 lines
535 B
C
22 lines
535 B
C
/*
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* OMAP3-common clock function prototypes and macros
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*
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* Copyright (C) 2007-2010 Texas Instruments, Inc.
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* Copyright (C) 2007-2010 Nokia Corporation
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*/
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#ifndef __ARCH_ARM_MACH_OMAP2_CLOCK3XXX_H
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#define __ARCH_ARM_MACH_OMAP2_CLOCK3XXX_H
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int omap3xxx_clk_init(void);
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int omap3_core_dpll_m2_set_rate(struct clk_hw *clk, unsigned long rate,
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unsigned long parent_rate);
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void omap3_clk_lock_dpll5(void);
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extern struct clk *sdrc_ick_p;
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extern struct clk *arm_fck_p;
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extern const struct clkops clkops_noncore_dpll_ops;
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#endif
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