forked from Minki/linux
9646b13467
The PLT firmware used by wl12xx for calibration always has the same version number as the single-role firmware. Currntly the driver rejects the PLT firmware since anything that is not single-role uses the multi-role version. Fix this by using the single-role version for everything except multi-role. Signed-off-by: Luciano Coelho <coelho@ti.com>
534 lines
14 KiB
C
534 lines
14 KiB
C
/*
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* This file is part of wl1271
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*
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* Copyright (C) 2008-2010 Nokia Corporation
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*
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* Contact: Luciano Coelho <luciano.coelho@nokia.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
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* 02110-1301 USA
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*
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*/
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#include <linux/slab.h>
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#include <linux/wl12xx.h>
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#include <linux/export.h>
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#include "debug.h"
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#include "acx.h"
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#include "boot.h"
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#include "io.h"
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#include "event.h"
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#include "rx.h"
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#include "hw_ops.h"
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static int wl1271_boot_set_ecpu_ctrl(struct wl1271 *wl, u32 flag)
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{
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u32 cpu_ctrl;
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int ret;
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/* 10.5.0 run the firmware (I) */
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ret = wlcore_read_reg(wl, REG_ECPU_CONTROL, &cpu_ctrl);
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if (ret < 0)
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goto out;
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/* 10.5.1 run the firmware (II) */
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cpu_ctrl |= flag;
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ret = wlcore_write_reg(wl, REG_ECPU_CONTROL, cpu_ctrl);
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out:
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return ret;
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}
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static int wlcore_boot_parse_fw_ver(struct wl1271 *wl,
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struct wl1271_static_data *static_data)
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{
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int ret;
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strncpy(wl->chip.fw_ver_str, static_data->fw_version,
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sizeof(wl->chip.fw_ver_str));
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/* make sure the string is NULL-terminated */
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wl->chip.fw_ver_str[sizeof(wl->chip.fw_ver_str) - 1] = '\0';
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ret = sscanf(wl->chip.fw_ver_str + 4, "%u.%u.%u.%u.%u",
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&wl->chip.fw_ver[0], &wl->chip.fw_ver[1],
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&wl->chip.fw_ver[2], &wl->chip.fw_ver[3],
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&wl->chip.fw_ver[4]);
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if (ret != 5) {
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wl1271_warning("fw version incorrect value");
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memset(wl->chip.fw_ver, 0, sizeof(wl->chip.fw_ver));
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ret = -EINVAL;
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goto out;
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}
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ret = wlcore_identify_fw(wl);
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if (ret < 0)
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goto out;
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out:
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return ret;
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}
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static int wlcore_validate_fw_ver(struct wl1271 *wl)
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{
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unsigned int *fw_ver = wl->chip.fw_ver;
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unsigned int *min_ver = (wl->fw_type == WL12XX_FW_TYPE_MULTI) ?
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wl->min_mr_fw_ver : wl->min_sr_fw_ver;
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char min_fw_str[32] = "";
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int i;
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/* the chip must be exactly equal */
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if ((min_ver[FW_VER_CHIP] != WLCORE_FW_VER_IGNORE) &&
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(min_ver[FW_VER_CHIP] != fw_ver[FW_VER_CHIP]))
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goto fail;
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/* the firmware type must be equal */
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if ((min_ver[FW_VER_IF_TYPE] != WLCORE_FW_VER_IGNORE) &&
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(min_ver[FW_VER_IF_TYPE] != fw_ver[FW_VER_IF_TYPE]))
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goto fail;
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/* the project number must be equal */
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if ((min_ver[FW_VER_SUBTYPE] != WLCORE_FW_VER_IGNORE) &&
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(min_ver[FW_VER_SUBTYPE] != fw_ver[FW_VER_SUBTYPE]))
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goto fail;
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/* the API version must be greater or equal */
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if ((min_ver[FW_VER_MAJOR] != WLCORE_FW_VER_IGNORE) &&
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(min_ver[FW_VER_MAJOR] > fw_ver[FW_VER_MAJOR]))
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goto fail;
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/* if the API version is equal... */
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if (((min_ver[FW_VER_MAJOR] == WLCORE_FW_VER_IGNORE) ||
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(min_ver[FW_VER_MAJOR] == fw_ver[FW_VER_MAJOR])) &&
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/* ...the minor must be greater or equal */
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((min_ver[FW_VER_MINOR] != WLCORE_FW_VER_IGNORE) &&
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(min_ver[FW_VER_MINOR] > fw_ver[FW_VER_MINOR])))
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goto fail;
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return 0;
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fail:
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for (i = 0; i < NUM_FW_VER; i++)
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if (min_ver[i] == WLCORE_FW_VER_IGNORE)
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snprintf(min_fw_str, sizeof(min_fw_str),
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"%s*.", min_fw_str);
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else
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snprintf(min_fw_str, sizeof(min_fw_str),
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"%s%u.", min_fw_str, min_ver[i]);
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wl1271_error("Your WiFi FW version (%u.%u.%u.%u.%u) is invalid.\n"
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"Please use at least FW %s\n"
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"You can get the latest firmwares at:\n"
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"git://github.com/TI-OpenLink/firmwares.git",
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fw_ver[FW_VER_CHIP], fw_ver[FW_VER_IF_TYPE],
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fw_ver[FW_VER_MAJOR], fw_ver[FW_VER_SUBTYPE],
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fw_ver[FW_VER_MINOR], min_fw_str);
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return -EINVAL;
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}
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static int wlcore_boot_static_data(struct wl1271 *wl)
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{
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struct wl1271_static_data *static_data;
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size_t len = sizeof(*static_data) + wl->static_data_priv_len;
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int ret;
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static_data = kmalloc(len, GFP_KERNEL);
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if (!static_data) {
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ret = -ENOMEM;
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goto out;
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}
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ret = wlcore_read(wl, wl->cmd_box_addr, static_data, len, false);
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if (ret < 0)
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goto out_free;
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ret = wlcore_boot_parse_fw_ver(wl, static_data);
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if (ret < 0)
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goto out_free;
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ret = wlcore_validate_fw_ver(wl);
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if (ret < 0)
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goto out_free;
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ret = wlcore_handle_static_data(wl, static_data);
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if (ret < 0)
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goto out_free;
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out_free:
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kfree(static_data);
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out:
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return ret;
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}
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static int wl1271_boot_upload_firmware_chunk(struct wl1271 *wl, void *buf,
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size_t fw_data_len, u32 dest)
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{
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struct wlcore_partition_set partition;
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int addr, chunk_num, partition_limit;
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u8 *p, *chunk;
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int ret;
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/* whal_FwCtrl_LoadFwImageSm() */
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wl1271_debug(DEBUG_BOOT, "starting firmware upload");
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wl1271_debug(DEBUG_BOOT, "fw_data_len %zd chunk_size %d",
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fw_data_len, CHUNK_SIZE);
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if ((fw_data_len % 4) != 0) {
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wl1271_error("firmware length not multiple of four");
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return -EIO;
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}
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chunk = kmalloc(CHUNK_SIZE, GFP_KERNEL);
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if (!chunk) {
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wl1271_error("allocation for firmware upload chunk failed");
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return -ENOMEM;
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}
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memcpy(&partition, &wl->ptable[PART_DOWN], sizeof(partition));
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partition.mem.start = dest;
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ret = wlcore_set_partition(wl, &partition);
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if (ret < 0)
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goto out;
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/* 10.1 set partition limit and chunk num */
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chunk_num = 0;
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partition_limit = wl->ptable[PART_DOWN].mem.size;
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while (chunk_num < fw_data_len / CHUNK_SIZE) {
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/* 10.2 update partition, if needed */
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addr = dest + (chunk_num + 2) * CHUNK_SIZE;
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if (addr > partition_limit) {
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addr = dest + chunk_num * CHUNK_SIZE;
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partition_limit = chunk_num * CHUNK_SIZE +
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wl->ptable[PART_DOWN].mem.size;
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partition.mem.start = addr;
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ret = wlcore_set_partition(wl, &partition);
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if (ret < 0)
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goto out;
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}
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/* 10.3 upload the chunk */
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addr = dest + chunk_num * CHUNK_SIZE;
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p = buf + chunk_num * CHUNK_SIZE;
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memcpy(chunk, p, CHUNK_SIZE);
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wl1271_debug(DEBUG_BOOT, "uploading fw chunk 0x%p to 0x%x",
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p, addr);
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ret = wlcore_write(wl, addr, chunk, CHUNK_SIZE, false);
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if (ret < 0)
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goto out;
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chunk_num++;
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}
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/* 10.4 upload the last chunk */
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addr = dest + chunk_num * CHUNK_SIZE;
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p = buf + chunk_num * CHUNK_SIZE;
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memcpy(chunk, p, fw_data_len % CHUNK_SIZE);
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wl1271_debug(DEBUG_BOOT, "uploading fw last chunk (%zd B) 0x%p to 0x%x",
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fw_data_len % CHUNK_SIZE, p, addr);
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ret = wlcore_write(wl, addr, chunk, fw_data_len % CHUNK_SIZE, false);
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out:
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kfree(chunk);
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return ret;
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}
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int wlcore_boot_upload_firmware(struct wl1271 *wl)
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{
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u32 chunks, addr, len;
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int ret = 0;
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u8 *fw;
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fw = wl->fw;
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chunks = be32_to_cpup((__be32 *) fw);
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fw += sizeof(u32);
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wl1271_debug(DEBUG_BOOT, "firmware chunks to be uploaded: %u", chunks);
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while (chunks--) {
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addr = be32_to_cpup((__be32 *) fw);
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fw += sizeof(u32);
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len = be32_to_cpup((__be32 *) fw);
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fw += sizeof(u32);
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if (len > 300000) {
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wl1271_info("firmware chunk too long: %u", len);
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return -EINVAL;
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}
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wl1271_debug(DEBUG_BOOT, "chunk %d addr 0x%x len %u",
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chunks, addr, len);
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ret = wl1271_boot_upload_firmware_chunk(wl, fw, len, addr);
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if (ret != 0)
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break;
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fw += len;
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}
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return ret;
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}
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EXPORT_SYMBOL_GPL(wlcore_boot_upload_firmware);
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int wlcore_boot_upload_nvs(struct wl1271 *wl)
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{
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size_t nvs_len, burst_len;
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int i;
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u32 dest_addr, val;
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u8 *nvs_ptr, *nvs_aligned;
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int ret;
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if (wl->nvs == NULL) {
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wl1271_error("NVS file is needed during boot");
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return -ENODEV;
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}
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if (wl->quirks & WLCORE_QUIRK_LEGACY_NVS) {
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struct wl1271_nvs_file *nvs =
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(struct wl1271_nvs_file *)wl->nvs;
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/*
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* FIXME: the LEGACY NVS image support (NVS's missing the 5GHz
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* band configurations) can be removed when those NVS files stop
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* floating around.
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*/
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if (wl->nvs_len == sizeof(struct wl1271_nvs_file) ||
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wl->nvs_len == WL1271_INI_LEGACY_NVS_FILE_SIZE) {
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if (nvs->general_params.dual_mode_select)
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wl->enable_11a = true;
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}
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if (wl->nvs_len != sizeof(struct wl1271_nvs_file) &&
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(wl->nvs_len != WL1271_INI_LEGACY_NVS_FILE_SIZE ||
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wl->enable_11a)) {
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wl1271_error("nvs size is not as expected: %zu != %zu",
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wl->nvs_len, sizeof(struct wl1271_nvs_file));
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kfree(wl->nvs);
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wl->nvs = NULL;
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wl->nvs_len = 0;
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return -EILSEQ;
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}
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/* only the first part of the NVS needs to be uploaded */
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nvs_len = sizeof(nvs->nvs);
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nvs_ptr = (u8 *) nvs->nvs;
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} else {
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struct wl128x_nvs_file *nvs = (struct wl128x_nvs_file *)wl->nvs;
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if (wl->nvs_len == sizeof(struct wl128x_nvs_file)) {
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if (nvs->general_params.dual_mode_select)
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wl->enable_11a = true;
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} else {
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wl1271_error("nvs size is not as expected: %zu != %zu",
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wl->nvs_len,
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sizeof(struct wl128x_nvs_file));
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kfree(wl->nvs);
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wl->nvs = NULL;
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wl->nvs_len = 0;
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return -EILSEQ;
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}
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/* only the first part of the NVS needs to be uploaded */
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nvs_len = sizeof(nvs->nvs);
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nvs_ptr = (u8 *)nvs->nvs;
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}
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/* update current MAC address to NVS */
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nvs_ptr[11] = wl->addresses[0].addr[0];
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nvs_ptr[10] = wl->addresses[0].addr[1];
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nvs_ptr[6] = wl->addresses[0].addr[2];
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nvs_ptr[5] = wl->addresses[0].addr[3];
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nvs_ptr[4] = wl->addresses[0].addr[4];
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nvs_ptr[3] = wl->addresses[0].addr[5];
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/*
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* Layout before the actual NVS tables:
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* 1 byte : burst length.
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* 2 bytes: destination address.
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* n bytes: data to burst copy.
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*
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* This is ended by a 0 length, then the NVS tables.
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*/
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/* FIXME: Do we need to check here whether the LSB is 1? */
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while (nvs_ptr[0]) {
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burst_len = nvs_ptr[0];
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dest_addr = (nvs_ptr[1] & 0xfe) | ((u32)(nvs_ptr[2] << 8));
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/*
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* Due to our new wl1271_translate_reg_addr function,
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* we need to add the register partition start address
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* to the destination
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*/
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dest_addr += wl->curr_part.reg.start;
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/* We move our pointer to the data */
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nvs_ptr += 3;
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for (i = 0; i < burst_len; i++) {
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if (nvs_ptr + 3 >= (u8 *) wl->nvs + nvs_len)
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goto out_badnvs;
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val = (nvs_ptr[0] | (nvs_ptr[1] << 8)
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| (nvs_ptr[2] << 16) | (nvs_ptr[3] << 24));
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wl1271_debug(DEBUG_BOOT,
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"nvs burst write 0x%x: 0x%x",
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dest_addr, val);
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ret = wlcore_write32(wl, dest_addr, val);
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if (ret < 0)
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return ret;
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nvs_ptr += 4;
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dest_addr += 4;
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}
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if (nvs_ptr >= (u8 *) wl->nvs + nvs_len)
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goto out_badnvs;
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}
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/*
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* We've reached the first zero length, the first NVS table
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* is located at an aligned offset which is at least 7 bytes further.
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* NOTE: The wl->nvs->nvs element must be first, in order to
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* simplify the casting, we assume it is at the beginning of
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* the wl->nvs structure.
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*/
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nvs_ptr = (u8 *)wl->nvs +
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ALIGN(nvs_ptr - (u8 *)wl->nvs + 7, 4);
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if (nvs_ptr >= (u8 *) wl->nvs + nvs_len)
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goto out_badnvs;
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nvs_len -= nvs_ptr - (u8 *)wl->nvs;
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/* Now we must set the partition correctly */
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ret = wlcore_set_partition(wl, &wl->ptable[PART_WORK]);
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if (ret < 0)
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return ret;
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/* Copy the NVS tables to a new block to ensure alignment */
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nvs_aligned = kmemdup(nvs_ptr, nvs_len, GFP_KERNEL);
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if (!nvs_aligned)
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return -ENOMEM;
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/* And finally we upload the NVS tables */
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ret = wlcore_write_data(wl, REG_CMD_MBOX_ADDRESS, nvs_aligned, nvs_len,
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false);
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kfree(nvs_aligned);
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return ret;
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out_badnvs:
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wl1271_error("nvs data is malformed");
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return -EILSEQ;
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}
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EXPORT_SYMBOL_GPL(wlcore_boot_upload_nvs);
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int wlcore_boot_run_firmware(struct wl1271 *wl)
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{
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int loop, ret;
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u32 chip_id, intr;
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/* Make sure we have the boot partition */
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ret = wlcore_set_partition(wl, &wl->ptable[PART_BOOT]);
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if (ret < 0)
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return ret;
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ret = wl1271_boot_set_ecpu_ctrl(wl, ECPU_CONTROL_HALT);
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if (ret < 0)
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return ret;
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ret = wlcore_read_reg(wl, REG_CHIP_ID_B, &chip_id);
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if (ret < 0)
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return ret;
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wl1271_debug(DEBUG_BOOT, "chip id after firmware boot: 0x%x", chip_id);
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if (chip_id != wl->chip.id) {
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wl1271_error("chip id doesn't match after firmware boot");
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return -EIO;
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}
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/* wait for init to complete */
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loop = 0;
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while (loop++ < INIT_LOOP) {
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udelay(INIT_LOOP_DELAY);
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ret = wlcore_read_reg(wl, REG_INTERRUPT_NO_CLEAR, &intr);
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if (ret < 0)
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return ret;
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if (intr == 0xffffffff) {
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wl1271_error("error reading hardware complete "
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"init indication");
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return -EIO;
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}
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/* check that ACX_INTR_INIT_COMPLETE is enabled */
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else if (intr & WL1271_ACX_INTR_INIT_COMPLETE) {
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|
ret = wlcore_write_reg(wl, REG_INTERRUPT_ACK,
|
|
WL1271_ACX_INTR_INIT_COMPLETE);
|
|
if (ret < 0)
|
|
return ret;
|
|
break;
|
|
}
|
|
}
|
|
|
|
if (loop > INIT_LOOP) {
|
|
wl1271_error("timeout waiting for the hardware to "
|
|
"complete initialization");
|
|
return -EIO;
|
|
}
|
|
|
|
/* get hardware config command mail box */
|
|
ret = wlcore_read_reg(wl, REG_COMMAND_MAILBOX_PTR, &wl->cmd_box_addr);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
wl1271_debug(DEBUG_MAILBOX, "cmd_box_addr 0x%x", wl->cmd_box_addr);
|
|
|
|
/* get hardware config event mail box */
|
|
ret = wlcore_read_reg(wl, REG_EVENT_MAILBOX_PTR, &wl->mbox_ptr[0]);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
wl->mbox_ptr[1] = wl->mbox_ptr[0] + wl->mbox_size;
|
|
|
|
wl1271_debug(DEBUG_MAILBOX, "MBOX ptrs: 0x%x 0x%x",
|
|
wl->mbox_ptr[0], wl->mbox_ptr[1]);
|
|
|
|
ret = wlcore_boot_static_data(wl);
|
|
if (ret < 0) {
|
|
wl1271_error("error getting static data");
|
|
return ret;
|
|
}
|
|
|
|
/*
|
|
* in case of full asynchronous mode the firmware event must be
|
|
* ready to receive event from the command mailbox
|
|
*/
|
|
|
|
/* unmask required mbox events */
|
|
ret = wl1271_event_unmask(wl);
|
|
if (ret < 0) {
|
|
wl1271_error("EVENT mask setting failed");
|
|
return ret;
|
|
}
|
|
|
|
/* set the working partition to its "running" mode offset */
|
|
ret = wlcore_set_partition(wl, &wl->ptable[PART_WORK]);
|
|
|
|
/* firmware startup completed */
|
|
return ret;
|
|
}
|
|
EXPORT_SYMBOL_GPL(wlcore_boot_run_firmware);
|