poonam aggrwal 5224644551 powerpc/b4860: Renamed the L2 caches ... To make provision for more than one L2 caches in the system, change the name from L2 to L2_1; same as in T4 platforms. * Also remove the L2 entry from common file "arch/powerpc/boot/dts/fsl/b4si-post.dtsi" Keep them only in separate files for b4860 and b4420. Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>		2015-10-17 00:36:34 -05:00
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alpha	PCI updates for v4.3:	2015-09-25 11:16:53 -07:00
arc
arm	Merge branch 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm	2015-09-27 06:48:48 -04:00
arm64
avr32
blackfin
c6x
cris
frv
h8300
hexagon
ia64	PCI updates for v4.3:	2015-09-25 11:16:53 -07:00
m32r
m68k
metag
microblaze
mips	PCI updates for v4.3:	2015-09-25 11:16:53 -07:00
mn10300
nios2
openrisc
parisc
powerpc	powerpc/b4860: Renamed the L2 caches	2015-10-17 00:36:34 -05:00
s390
score
sh
sparc
tile
um
unicore32
x86	Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip	2015-09-27 06:51:42 -04:00
xtensa
.gitignore
Kconfig