Sergio Paracuellos 519c49678a staging: mt7621-dts: use clock in pci phy nodes ... MT7621 SoC clock driver has already mainlined in 'commit 48df7a26f4 ("clk: ralink: add clock driver for mt7621 SoC")' Hence we can use the clock in pcie phy nodes to be able to get it from there in driver code. Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Link: https://lore.kernel.org/r/20210514112820.32499-1-sergio.paracuellos@gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>		2021-05-14 13:54:03 +02:00
..
gbpc1.dts	staging: mt7621-dts: make use of new 'mt7621-clk'	2021-04-12 19:10:54 -07:00
gbpc2.dts
Kconfig
Makefile
mt7621.dtsi	staging: mt7621-dts: use clock in pci phy nodes	2021-05-14 13:54:03 +02:00
TODO