forked from Minki/linux
7852ec0536
Find and unwrap wrapped strings in the style:
pr_debug("clockdomain: hardware cannot set/clear wake up of "
"%s when %s wakes up\n", clkdm1->name, clkdm2->name);
Keeping these strings contiguous seems to be the current Linux kernel
policy.
The offending lines were found with the following command:
pcregrep -rnM '"\s*$\s*"' arch/arm/*omap*
While here, some messages have been clarified, some pr_warning(
... calls have been converted to pr_warn( ..., and some printk(KERN_*
... have been converted to pr_*.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
227 lines
5.6 KiB
C
227 lines
5.6 KiB
C
/*
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* OMAP4 powerdomain control
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*
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* Copyright (C) 2009-2010 Texas Instruments, Inc.
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* Copyright (C) 2007-2009 Nokia Corporation
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*
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* Derived from mach-omap2/powerdomain.c written by Paul Walmsley
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* Rajendra Nayak <rnayak@ti.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/io.h>
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#include <linux/errno.h>
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#include <linux/delay.h>
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#include <linux/bug.h>
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#include "powerdomain.h"
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#include <plat/prcm.h>
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#include "prm2xxx_3xxx.h"
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#include "prm44xx.h"
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#include "prminst44xx.h"
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#include "prm-regbits-44xx.h"
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static int omap4_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
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{
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omap4_prminst_rmw_inst_reg_bits(OMAP_POWERSTATE_MASK,
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(pwrst << OMAP_POWERSTATE_SHIFT),
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pwrdm->prcm_partition,
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pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL);
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return 0;
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}
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static int omap4_pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
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{
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u32 v;
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v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs,
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OMAP4_PM_PWSTCTRL);
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v &= OMAP_POWERSTATE_MASK;
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v >>= OMAP_POWERSTATE_SHIFT;
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return v;
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}
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static int omap4_pwrdm_read_pwrst(struct powerdomain *pwrdm)
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{
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u32 v;
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v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs,
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OMAP4_PM_PWSTST);
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v &= OMAP_POWERSTATEST_MASK;
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v >>= OMAP_POWERSTATEST_SHIFT;
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return v;
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}
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static int omap4_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm)
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{
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u32 v;
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v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs,
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OMAP4_PM_PWSTST);
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v &= OMAP4430_LASTPOWERSTATEENTERED_MASK;
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v >>= OMAP4430_LASTPOWERSTATEENTERED_SHIFT;
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return v;
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}
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static int omap4_pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm)
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{
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omap4_prminst_rmw_inst_reg_bits(OMAP4430_LOWPOWERSTATECHANGE_MASK,
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(1 << OMAP4430_LOWPOWERSTATECHANGE_SHIFT),
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pwrdm->prcm_partition,
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pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL);
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return 0;
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}
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static int omap4_pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm)
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{
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omap4_prminst_rmw_inst_reg_bits(OMAP4430_LASTPOWERSTATEENTERED_MASK,
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OMAP4430_LASTPOWERSTATEENTERED_MASK,
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pwrdm->prcm_partition,
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pwrdm->prcm_offs, OMAP4_PM_PWSTST);
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return 0;
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}
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static int omap4_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst)
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{
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u32 v;
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v = pwrst << __ffs(OMAP4430_LOGICRETSTATE_MASK);
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omap4_prminst_rmw_inst_reg_bits(OMAP4430_LOGICRETSTATE_MASK, v,
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pwrdm->prcm_partition, pwrdm->prcm_offs,
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OMAP4_PM_PWSTCTRL);
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return 0;
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}
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static int omap4_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank,
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u8 pwrst)
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{
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u32 m;
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m = omap2_pwrdm_get_mem_bank_onstate_mask(bank);
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omap4_prminst_rmw_inst_reg_bits(m, (pwrst << __ffs(m)),
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pwrdm->prcm_partition, pwrdm->prcm_offs,
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OMAP4_PM_PWSTCTRL);
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return 0;
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}
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static int omap4_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank,
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u8 pwrst)
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{
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u32 m;
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m = omap2_pwrdm_get_mem_bank_retst_mask(bank);
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omap4_prminst_rmw_inst_reg_bits(m, (pwrst << __ffs(m)),
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pwrdm->prcm_partition, pwrdm->prcm_offs,
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OMAP4_PM_PWSTCTRL);
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return 0;
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}
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static int omap4_pwrdm_read_logic_pwrst(struct powerdomain *pwrdm)
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{
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u32 v;
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v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs,
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OMAP4_PM_PWSTST);
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v &= OMAP4430_LOGICSTATEST_MASK;
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v >>= OMAP4430_LOGICSTATEST_SHIFT;
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return v;
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}
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static int omap4_pwrdm_read_logic_retst(struct powerdomain *pwrdm)
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{
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u32 v;
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v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs,
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OMAP4_PM_PWSTCTRL);
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v &= OMAP4430_LOGICRETSTATE_MASK;
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v >>= OMAP4430_LOGICRETSTATE_SHIFT;
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return v;
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}
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static int omap4_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank)
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{
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u32 m, v;
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m = omap2_pwrdm_get_mem_bank_stst_mask(bank);
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v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs,
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OMAP4_PM_PWSTST);
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v &= m;
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v >>= __ffs(m);
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return v;
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}
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static int omap4_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank)
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{
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u32 m, v;
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m = omap2_pwrdm_get_mem_bank_retst_mask(bank);
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v = omap4_prminst_read_inst_reg(pwrdm->prcm_partition, pwrdm->prcm_offs,
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OMAP4_PM_PWSTCTRL);
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v &= m;
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v >>= __ffs(m);
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return v;
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}
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static int omap4_pwrdm_wait_transition(struct powerdomain *pwrdm)
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{
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u32 c = 0;
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/*
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* REVISIT: pwrdm_wait_transition() may be better implemented
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* via a callback and a periodic timer check -- how long do we expect
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* powerdomain transitions to take?
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*/
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/* XXX Is this udelay() value meaningful? */
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while ((omap4_prminst_read_inst_reg(pwrdm->prcm_partition,
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pwrdm->prcm_offs,
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OMAP4_PM_PWSTST) &
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OMAP_INTRANSITION_MASK) &&
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(c++ < PWRDM_TRANSITION_BAILOUT))
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udelay(1);
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if (c > PWRDM_TRANSITION_BAILOUT) {
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pr_err("powerdomain: %s: waited too long to complete transition\n",
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pwrdm->name);
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return -EAGAIN;
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}
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pr_debug("powerdomain: completed transition in %d loops\n", c);
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return 0;
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}
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struct pwrdm_ops omap4_pwrdm_operations = {
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.pwrdm_set_next_pwrst = omap4_pwrdm_set_next_pwrst,
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.pwrdm_read_next_pwrst = omap4_pwrdm_read_next_pwrst,
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.pwrdm_read_pwrst = omap4_pwrdm_read_pwrst,
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.pwrdm_read_prev_pwrst = omap4_pwrdm_read_prev_pwrst,
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.pwrdm_set_lowpwrstchange = omap4_pwrdm_set_lowpwrstchange,
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.pwrdm_clear_all_prev_pwrst = omap4_pwrdm_clear_all_prev_pwrst,
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.pwrdm_set_logic_retst = omap4_pwrdm_set_logic_retst,
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.pwrdm_read_logic_pwrst = omap4_pwrdm_read_logic_pwrst,
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.pwrdm_read_logic_retst = omap4_pwrdm_read_logic_retst,
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.pwrdm_read_mem_pwrst = omap4_pwrdm_read_mem_pwrst,
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.pwrdm_read_mem_retst = omap4_pwrdm_read_mem_retst,
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.pwrdm_set_mem_onst = omap4_pwrdm_set_mem_onst,
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.pwrdm_set_mem_retst = omap4_pwrdm_set_mem_retst,
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.pwrdm_wait_transition = omap4_pwrdm_wait_transition,
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};
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