On sm8250 videocc requires MMCX power domain to be powered up before clock controller's registers become available. For now sm8250 was using external regulator driven by the power domain to describe this relationship. Switch into specifying power-domain and required opp-state directly. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210829154757.784699-3-dmitry.baryshkov@linaro.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
89 lines
1.9 KiB
YAML
89 lines
1.9 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/qcom,videocc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Video Clock & Reset Controller Binding
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maintainers:
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- Taniya Das <tdas@codeaurora.org>
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description: |
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Qualcomm video clock control module which supports the clocks, resets and
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power domains on Qualcomm SoCs.
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See also:
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dt-bindings/clock/qcom,videocc-sc7180.h
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dt-bindings/clock/qcom,videocc-sc7280.h
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dt-bindings/clock/qcom,videocc-sdm845.h
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dt-bindings/clock/qcom,videocc-sm8150.h
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dt-bindings/clock/qcom,videocc-sm8250.h
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properties:
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compatible:
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enum:
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- qcom,sc7180-videocc
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- qcom,sc7280-videocc
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- qcom,sdm845-videocc
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- qcom,sm8150-videocc
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- qcom,sm8250-videocc
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clocks:
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items:
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- description: Board XO source
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clock-names:
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items:
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- const: bi_tcxo
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'#clock-cells':
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const: 1
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'#reset-cells':
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const: 1
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'#power-domain-cells':
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const: 1
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reg:
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maxItems: 1
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power-domains:
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description:
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A phandle and PM domain specifier for the MMCX power domain.
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maxItems: 1
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required-opps:
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description:
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A phandle to an OPP node describing required MMCX performance point.
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maxItems: 1
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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- '#clock-cells'
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- '#reset-cells'
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- '#power-domain-cells'
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/qcom,rpmh.h>
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#include <dt-bindings/power/qcom-rpmpd.h>
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clock-controller@ab00000 {
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compatible = "qcom,sdm845-videocc";
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reg = <0x0ab00000 0x10000>;
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clocks = <&rpmhcc RPMH_CXO_CLK>;
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clock-names = "bi_tcxo";
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#clock-cells = <1>;
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#reset-cells = <1>;
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#power-domain-cells = <1>;
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power-domains = <&rpmhpd SM8250_MMCX>;
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required-opps = <&rpmhpd_opp_low_svs>;
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};
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...
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