forked from Minki/linux
7158627686
This patch implements optimised percpu variable accesses using the el1 r/w thread register (tpidr_el1) along the same lines as arch/arm/. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
42 lines
1.2 KiB
C
42 lines
1.2 KiB
C
/*
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* Copyright (C) 2013 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __ASM_PERCPU_H
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#define __ASM_PERCPU_H
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static inline void set_my_cpu_offset(unsigned long off)
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{
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asm volatile("msr tpidr_el1, %0" :: "r" (off) : "memory");
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}
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static inline unsigned long __my_cpu_offset(void)
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{
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unsigned long off;
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register unsigned long *sp asm ("sp");
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/*
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* We want to allow caching the value, so avoid using volatile and
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* instead use a fake stack read to hazard against barrier().
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*/
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asm("mrs %0, tpidr_el1" : "=r" (off) : "Q" (*sp));
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return off;
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}
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#define __my_cpu_offset __my_cpu_offset()
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#include <asm-generic/percpu.h>
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#endif /* __ASM_PERCPU_H */
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