forked from Minki/linux
66a173b926
Pull powerpc updates from Benjamin Herrenschmidt: "The bulk of this is LE updates. One should now be able to build an LE kernel and even run some things in it. I'm still sitting on a handful of patches to enable the new ABI that I *might* still send this merge window around, but due to the incertainty (they are pretty fresh) I want to keep them separate. Other notable changes are some infrastructure bits to better handle PCI pass-through under KVM, some bits and pieces added to the new PowerNV platform support such as access to the CPU SCOM bus via sysfs, and support for EEH error handling on PHB3 (Power8 PCIe). We also grew arch_get_random_long() for both pseries and powernv when running on P7+ and P8, exploiting the HW rng. And finally various embedded updates from freescale" * 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (154 commits) powerpc: Fix fatal SLB miss when restoring PPR powerpc/powernv: Reserve the correct PE number powerpc/powernv: Add PE to its own PELTV powerpc/powernv: Add support for indirect XSCOM via debugfs powerpc/scom: Improve debugfs interface powerpc/scom: Enable 64-bit addresses powerpc/boot: Properly handle the base "of" boot wrapper powerpc/bpf: Support MOD operation powerpc/bpf: Fix DIVWU instruction opcode of: Move definition of of_find_next_cache_node into common code. powerpc: Remove big endianness assumption in of_find_next_cache_node powerpc/tm: Remove interrupt disable in __switch_to() powerpc: word-at-a-time optimization for 64-bit Little Endian powerpc/bpf: BPF JIT compiler for 64-bit Little Endian powerpc: Only save/restore SDR1 if in hypervisor mode powerpc/pmu: Fix ADB_PMU_LED_IDE dependencies powerpc/nvram: Fix endian issue when using the partition length powerpc/nvram: Fix endian issue when reading the NVRAM size powerpc/nvram: Scan partitions only once powerpc/mpc512x: remove unnecessary #if ...
703 lines
19 KiB
C
703 lines
19 KiB
C
/* bpf_jit_comp.c: BPF JIT compiler for PPC64
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*
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* Copyright 2011 Matt Evans <matt@ozlabs.org>, IBM Corporation
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*
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* Based on the x86 BPF compiler, by Eric Dumazet (eric.dumazet@gmail.com)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; version 2
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* of the License.
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*/
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#include <linux/moduleloader.h>
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#include <asm/cacheflush.h>
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#include <linux/netdevice.h>
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#include <linux/filter.h>
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#include <linux/if_vlan.h>
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#include "bpf_jit.h"
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int bpf_jit_enable __read_mostly;
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static inline void bpf_flush_icache(void *start, void *end)
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{
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smp_wmb();
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flush_icache_range((unsigned long)start, (unsigned long)end);
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}
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static void bpf_jit_build_prologue(struct sk_filter *fp, u32 *image,
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struct codegen_context *ctx)
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{
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int i;
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const struct sock_filter *filter = fp->insns;
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if (ctx->seen & (SEEN_MEM | SEEN_DATAREF)) {
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/* Make stackframe */
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if (ctx->seen & SEEN_DATAREF) {
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/* If we call any helpers (for loads), save LR */
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EMIT(PPC_INST_MFLR | __PPC_RT(R0));
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PPC_STD(0, 1, 16);
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/* Back up non-volatile regs. */
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PPC_STD(r_D, 1, -(8*(32-r_D)));
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PPC_STD(r_HL, 1, -(8*(32-r_HL)));
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}
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if (ctx->seen & SEEN_MEM) {
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/*
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* Conditionally save regs r15-r31 as some will be used
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* for M[] data.
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*/
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for (i = r_M; i < (r_M+16); i++) {
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if (ctx->seen & (1 << (i-r_M)))
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PPC_STD(i, 1, -(8*(32-i)));
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}
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}
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EMIT(PPC_INST_STDU | __PPC_RS(R1) | __PPC_RA(R1) |
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(-BPF_PPC_STACKFRAME & 0xfffc));
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}
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if (ctx->seen & SEEN_DATAREF) {
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/*
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* If this filter needs to access skb data,
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* prepare r_D and r_HL:
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* r_HL = skb->len - skb->data_len
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* r_D = skb->data
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*/
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PPC_LWZ_OFFS(r_scratch1, r_skb, offsetof(struct sk_buff,
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data_len));
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PPC_LWZ_OFFS(r_HL, r_skb, offsetof(struct sk_buff, len));
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PPC_SUB(r_HL, r_HL, r_scratch1);
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PPC_LD_OFFS(r_D, r_skb, offsetof(struct sk_buff, data));
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}
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if (ctx->seen & SEEN_XREG) {
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/*
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* TODO: Could also detect whether first instr. sets X and
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* avoid this (as below, with A).
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*/
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PPC_LI(r_X, 0);
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}
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switch (filter[0].code) {
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case BPF_S_RET_K:
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case BPF_S_LD_W_LEN:
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case BPF_S_ANC_PROTOCOL:
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case BPF_S_ANC_IFINDEX:
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case BPF_S_ANC_MARK:
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case BPF_S_ANC_RXHASH:
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case BPF_S_ANC_VLAN_TAG:
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case BPF_S_ANC_VLAN_TAG_PRESENT:
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case BPF_S_ANC_CPU:
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case BPF_S_ANC_QUEUE:
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case BPF_S_LD_W_ABS:
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case BPF_S_LD_H_ABS:
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case BPF_S_LD_B_ABS:
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/* first instruction sets A register (or is RET 'constant') */
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break;
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default:
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/* make sure we dont leak kernel information to user */
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PPC_LI(r_A, 0);
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}
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}
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static void bpf_jit_build_epilogue(u32 *image, struct codegen_context *ctx)
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{
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int i;
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if (ctx->seen & (SEEN_MEM | SEEN_DATAREF)) {
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PPC_ADDI(1, 1, BPF_PPC_STACKFRAME);
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if (ctx->seen & SEEN_DATAREF) {
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PPC_LD(0, 1, 16);
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PPC_MTLR(0);
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PPC_LD(r_D, 1, -(8*(32-r_D)));
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PPC_LD(r_HL, 1, -(8*(32-r_HL)));
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}
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if (ctx->seen & SEEN_MEM) {
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/* Restore any saved non-vol registers */
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for (i = r_M; i < (r_M+16); i++) {
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if (ctx->seen & (1 << (i-r_M)))
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PPC_LD(i, 1, -(8*(32-i)));
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}
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}
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}
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/* The RETs have left a return value in R3. */
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PPC_BLR();
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}
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#define CHOOSE_LOAD_FUNC(K, func) \
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((int)K < 0 ? ((int)K >= SKF_LL_OFF ? func##_negative_offset : func) : func##_positive_offset)
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/* Assemble the body code between the prologue & epilogue. */
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static int bpf_jit_build_body(struct sk_filter *fp, u32 *image,
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struct codegen_context *ctx,
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unsigned int *addrs)
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{
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const struct sock_filter *filter = fp->insns;
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int flen = fp->len;
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u8 *func;
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unsigned int true_cond;
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int i;
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/* Start of epilogue code */
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unsigned int exit_addr = addrs[flen];
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for (i = 0; i < flen; i++) {
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unsigned int K = filter[i].k;
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/*
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* addrs[] maps a BPF bytecode address into a real offset from
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* the start of the body code.
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*/
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addrs[i] = ctx->idx * 4;
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switch (filter[i].code) {
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/*** ALU ops ***/
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case BPF_S_ALU_ADD_X: /* A += X; */
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ctx->seen |= SEEN_XREG;
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PPC_ADD(r_A, r_A, r_X);
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break;
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case BPF_S_ALU_ADD_K: /* A += K; */
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if (!K)
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break;
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PPC_ADDI(r_A, r_A, IMM_L(K));
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if (K >= 32768)
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PPC_ADDIS(r_A, r_A, IMM_HA(K));
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break;
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case BPF_S_ALU_SUB_X: /* A -= X; */
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ctx->seen |= SEEN_XREG;
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PPC_SUB(r_A, r_A, r_X);
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break;
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case BPF_S_ALU_SUB_K: /* A -= K */
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if (!K)
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break;
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PPC_ADDI(r_A, r_A, IMM_L(-K));
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if (K >= 32768)
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PPC_ADDIS(r_A, r_A, IMM_HA(-K));
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break;
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case BPF_S_ALU_MUL_X: /* A *= X; */
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ctx->seen |= SEEN_XREG;
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PPC_MUL(r_A, r_A, r_X);
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break;
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case BPF_S_ALU_MUL_K: /* A *= K */
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if (K < 32768)
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PPC_MULI(r_A, r_A, K);
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else {
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PPC_LI32(r_scratch1, K);
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PPC_MUL(r_A, r_A, r_scratch1);
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}
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break;
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case BPF_S_ALU_MOD_X: /* A %= X; */
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ctx->seen |= SEEN_XREG;
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PPC_CMPWI(r_X, 0);
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if (ctx->pc_ret0 != -1) {
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PPC_BCC(COND_EQ, addrs[ctx->pc_ret0]);
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} else {
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PPC_BCC_SHORT(COND_NE, (ctx->idx*4)+12);
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PPC_LI(r_ret, 0);
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PPC_JMP(exit_addr);
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}
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PPC_DIVWU(r_scratch1, r_A, r_X);
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PPC_MUL(r_scratch1, r_X, r_scratch1);
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PPC_SUB(r_A, r_A, r_scratch1);
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break;
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case BPF_S_ALU_MOD_K: /* A %= K; */
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PPC_LI32(r_scratch2, K);
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PPC_DIVWU(r_scratch1, r_A, r_scratch2);
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PPC_MUL(r_scratch1, r_scratch2, r_scratch1);
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PPC_SUB(r_A, r_A, r_scratch1);
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break;
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case BPF_S_ALU_DIV_X: /* A /= X; */
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ctx->seen |= SEEN_XREG;
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PPC_CMPWI(r_X, 0);
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if (ctx->pc_ret0 != -1) {
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PPC_BCC(COND_EQ, addrs[ctx->pc_ret0]);
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} else {
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/*
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* Exit, returning 0; first pass hits here
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* (longer worst-case code size).
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*/
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PPC_BCC_SHORT(COND_NE, (ctx->idx*4)+12);
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PPC_LI(r_ret, 0);
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PPC_JMP(exit_addr);
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}
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PPC_DIVWU(r_A, r_A, r_X);
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break;
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case BPF_S_ALU_DIV_K: /* A = reciprocal_divide(A, K); */
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PPC_LI32(r_scratch1, K);
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/* Top 32 bits of 64bit result -> A */
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PPC_MULHWU(r_A, r_A, r_scratch1);
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break;
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case BPF_S_ALU_AND_X:
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ctx->seen |= SEEN_XREG;
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PPC_AND(r_A, r_A, r_X);
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break;
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case BPF_S_ALU_AND_K:
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if (!IMM_H(K))
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PPC_ANDI(r_A, r_A, K);
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else {
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PPC_LI32(r_scratch1, K);
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PPC_AND(r_A, r_A, r_scratch1);
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}
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break;
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case BPF_S_ALU_OR_X:
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ctx->seen |= SEEN_XREG;
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PPC_OR(r_A, r_A, r_X);
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break;
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case BPF_S_ALU_OR_K:
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if (IMM_L(K))
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PPC_ORI(r_A, r_A, IMM_L(K));
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if (K >= 65536)
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PPC_ORIS(r_A, r_A, IMM_H(K));
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break;
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case BPF_S_ANC_ALU_XOR_X:
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case BPF_S_ALU_XOR_X: /* A ^= X */
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ctx->seen |= SEEN_XREG;
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PPC_XOR(r_A, r_A, r_X);
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break;
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case BPF_S_ALU_XOR_K: /* A ^= K */
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if (IMM_L(K))
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PPC_XORI(r_A, r_A, IMM_L(K));
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if (K >= 65536)
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PPC_XORIS(r_A, r_A, IMM_H(K));
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break;
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case BPF_S_ALU_LSH_X: /* A <<= X; */
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ctx->seen |= SEEN_XREG;
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PPC_SLW(r_A, r_A, r_X);
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break;
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case BPF_S_ALU_LSH_K:
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if (K == 0)
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break;
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else
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PPC_SLWI(r_A, r_A, K);
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break;
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case BPF_S_ALU_RSH_X: /* A >>= X; */
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ctx->seen |= SEEN_XREG;
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PPC_SRW(r_A, r_A, r_X);
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break;
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case BPF_S_ALU_RSH_K: /* A >>= K; */
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if (K == 0)
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break;
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else
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PPC_SRWI(r_A, r_A, K);
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break;
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case BPF_S_ALU_NEG:
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PPC_NEG(r_A, r_A);
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break;
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case BPF_S_RET_K:
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PPC_LI32(r_ret, K);
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if (!K) {
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if (ctx->pc_ret0 == -1)
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ctx->pc_ret0 = i;
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}
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/*
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* If this isn't the very last instruction, branch to
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* the epilogue if we've stuff to clean up. Otherwise,
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* if there's nothing to tidy, just return. If we /are/
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* the last instruction, we're about to fall through to
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* the epilogue to return.
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*/
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if (i != flen - 1) {
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/*
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* Note: 'seen' is properly valid only on pass
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* #2. Both parts of this conditional are the
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* same instruction size though, meaning the
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* first pass will still correctly determine the
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* code size/addresses.
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*/
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if (ctx->seen)
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PPC_JMP(exit_addr);
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else
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PPC_BLR();
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}
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break;
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case BPF_S_RET_A:
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PPC_MR(r_ret, r_A);
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if (i != flen - 1) {
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if (ctx->seen)
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PPC_JMP(exit_addr);
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else
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PPC_BLR();
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}
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break;
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case BPF_S_MISC_TAX: /* X = A */
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PPC_MR(r_X, r_A);
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break;
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case BPF_S_MISC_TXA: /* A = X */
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ctx->seen |= SEEN_XREG;
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PPC_MR(r_A, r_X);
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break;
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/*** Constant loads/M[] access ***/
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case BPF_S_LD_IMM: /* A = K */
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PPC_LI32(r_A, K);
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break;
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case BPF_S_LDX_IMM: /* X = K */
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PPC_LI32(r_X, K);
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break;
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case BPF_S_LD_MEM: /* A = mem[K] */
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PPC_MR(r_A, r_M + (K & 0xf));
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ctx->seen |= SEEN_MEM | (1<<(K & 0xf));
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break;
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case BPF_S_LDX_MEM: /* X = mem[K] */
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PPC_MR(r_X, r_M + (K & 0xf));
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ctx->seen |= SEEN_MEM | (1<<(K & 0xf));
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break;
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case BPF_S_ST: /* mem[K] = A */
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PPC_MR(r_M + (K & 0xf), r_A);
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ctx->seen |= SEEN_MEM | (1<<(K & 0xf));
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break;
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case BPF_S_STX: /* mem[K] = X */
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PPC_MR(r_M + (K & 0xf), r_X);
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ctx->seen |= SEEN_XREG | SEEN_MEM | (1<<(K & 0xf));
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break;
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case BPF_S_LD_W_LEN: /* A = skb->len; */
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BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, len) != 4);
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PPC_LWZ_OFFS(r_A, r_skb, offsetof(struct sk_buff, len));
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break;
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case BPF_S_LDX_W_LEN: /* X = skb->len; */
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PPC_LWZ_OFFS(r_X, r_skb, offsetof(struct sk_buff, len));
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break;
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/*** Ancillary info loads ***/
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case BPF_S_ANC_PROTOCOL: /* A = ntohs(skb->protocol); */
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BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff,
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protocol) != 2);
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PPC_NTOHS_OFFS(r_A, r_skb, offsetof(struct sk_buff,
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protocol));
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break;
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case BPF_S_ANC_IFINDEX:
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PPC_LD_OFFS(r_scratch1, r_skb, offsetof(struct sk_buff,
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dev));
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PPC_CMPDI(r_scratch1, 0);
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if (ctx->pc_ret0 != -1) {
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PPC_BCC(COND_EQ, addrs[ctx->pc_ret0]);
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} else {
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/* Exit, returning 0; first pass hits here. */
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PPC_BCC_SHORT(COND_NE, (ctx->idx*4)+12);
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PPC_LI(r_ret, 0);
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PPC_JMP(exit_addr);
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}
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BUILD_BUG_ON(FIELD_SIZEOF(struct net_device,
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ifindex) != 4);
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PPC_LWZ_OFFS(r_A, r_scratch1,
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offsetof(struct net_device, ifindex));
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break;
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case BPF_S_ANC_MARK:
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BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, mark) != 4);
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PPC_LWZ_OFFS(r_A, r_skb, offsetof(struct sk_buff,
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mark));
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break;
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case BPF_S_ANC_RXHASH:
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BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, rxhash) != 4);
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PPC_LWZ_OFFS(r_A, r_skb, offsetof(struct sk_buff,
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rxhash));
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break;
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case BPF_S_ANC_VLAN_TAG:
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case BPF_S_ANC_VLAN_TAG_PRESENT:
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BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, vlan_tci) != 2);
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PPC_LHZ_OFFS(r_A, r_skb, offsetof(struct sk_buff,
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vlan_tci));
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if (filter[i].code == BPF_S_ANC_VLAN_TAG)
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PPC_ANDI(r_A, r_A, VLAN_VID_MASK);
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else
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PPC_ANDI(r_A, r_A, VLAN_TAG_PRESENT);
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break;
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case BPF_S_ANC_QUEUE:
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BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff,
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queue_mapping) != 2);
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PPC_LHZ_OFFS(r_A, r_skb, offsetof(struct sk_buff,
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queue_mapping));
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break;
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case BPF_S_ANC_CPU:
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#ifdef CONFIG_SMP
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|
/*
|
|
* PACA ptr is r13:
|
|
* raw_smp_processor_id() = local_paca->paca_index
|
|
*/
|
|
BUILD_BUG_ON(FIELD_SIZEOF(struct paca_struct,
|
|
paca_index) != 2);
|
|
PPC_LHZ_OFFS(r_A, 13,
|
|
offsetof(struct paca_struct, paca_index));
|
|
#else
|
|
PPC_LI(r_A, 0);
|
|
#endif
|
|
break;
|
|
|
|
/*** Absolute loads from packet header/data ***/
|
|
case BPF_S_LD_W_ABS:
|
|
func = CHOOSE_LOAD_FUNC(K, sk_load_word);
|
|
goto common_load;
|
|
case BPF_S_LD_H_ABS:
|
|
func = CHOOSE_LOAD_FUNC(K, sk_load_half);
|
|
goto common_load;
|
|
case BPF_S_LD_B_ABS:
|
|
func = CHOOSE_LOAD_FUNC(K, sk_load_byte);
|
|
common_load:
|
|
/* Load from [K]. */
|
|
ctx->seen |= SEEN_DATAREF;
|
|
PPC_LI64(r_scratch1, func);
|
|
PPC_MTLR(r_scratch1);
|
|
PPC_LI32(r_addr, K);
|
|
PPC_BLRL();
|
|
/*
|
|
* Helper returns 'lt' condition on error, and an
|
|
* appropriate return value in r3
|
|
*/
|
|
PPC_BCC(COND_LT, exit_addr);
|
|
break;
|
|
|
|
/*** Indirect loads from packet header/data ***/
|
|
case BPF_S_LD_W_IND:
|
|
func = sk_load_word;
|
|
goto common_load_ind;
|
|
case BPF_S_LD_H_IND:
|
|
func = sk_load_half;
|
|
goto common_load_ind;
|
|
case BPF_S_LD_B_IND:
|
|
func = sk_load_byte;
|
|
common_load_ind:
|
|
/*
|
|
* Load from [X + K]. Negative offsets are tested for
|
|
* in the helper functions.
|
|
*/
|
|
ctx->seen |= SEEN_DATAREF | SEEN_XREG;
|
|
PPC_LI64(r_scratch1, func);
|
|
PPC_MTLR(r_scratch1);
|
|
PPC_ADDI(r_addr, r_X, IMM_L(K));
|
|
if (K >= 32768)
|
|
PPC_ADDIS(r_addr, r_addr, IMM_HA(K));
|
|
PPC_BLRL();
|
|
/* If error, cr0.LT set */
|
|
PPC_BCC(COND_LT, exit_addr);
|
|
break;
|
|
|
|
case BPF_S_LDX_B_MSH:
|
|
func = CHOOSE_LOAD_FUNC(K, sk_load_byte_msh);
|
|
goto common_load;
|
|
break;
|
|
|
|
/*** Jump and branches ***/
|
|
case BPF_S_JMP_JA:
|
|
if (K != 0)
|
|
PPC_JMP(addrs[i + 1 + K]);
|
|
break;
|
|
|
|
case BPF_S_JMP_JGT_K:
|
|
case BPF_S_JMP_JGT_X:
|
|
true_cond = COND_GT;
|
|
goto cond_branch;
|
|
case BPF_S_JMP_JGE_K:
|
|
case BPF_S_JMP_JGE_X:
|
|
true_cond = COND_GE;
|
|
goto cond_branch;
|
|
case BPF_S_JMP_JEQ_K:
|
|
case BPF_S_JMP_JEQ_X:
|
|
true_cond = COND_EQ;
|
|
goto cond_branch;
|
|
case BPF_S_JMP_JSET_K:
|
|
case BPF_S_JMP_JSET_X:
|
|
true_cond = COND_NE;
|
|
/* Fall through */
|
|
cond_branch:
|
|
/* same targets, can avoid doing the test :) */
|
|
if (filter[i].jt == filter[i].jf) {
|
|
if (filter[i].jt > 0)
|
|
PPC_JMP(addrs[i + 1 + filter[i].jt]);
|
|
break;
|
|
}
|
|
|
|
switch (filter[i].code) {
|
|
case BPF_S_JMP_JGT_X:
|
|
case BPF_S_JMP_JGE_X:
|
|
case BPF_S_JMP_JEQ_X:
|
|
ctx->seen |= SEEN_XREG;
|
|
PPC_CMPLW(r_A, r_X);
|
|
break;
|
|
case BPF_S_JMP_JSET_X:
|
|
ctx->seen |= SEEN_XREG;
|
|
PPC_AND_DOT(r_scratch1, r_A, r_X);
|
|
break;
|
|
case BPF_S_JMP_JEQ_K:
|
|
case BPF_S_JMP_JGT_K:
|
|
case BPF_S_JMP_JGE_K:
|
|
if (K < 32768)
|
|
PPC_CMPLWI(r_A, K);
|
|
else {
|
|
PPC_LI32(r_scratch1, K);
|
|
PPC_CMPLW(r_A, r_scratch1);
|
|
}
|
|
break;
|
|
case BPF_S_JMP_JSET_K:
|
|
if (K < 32768)
|
|
/* PPC_ANDI is /only/ dot-form */
|
|
PPC_ANDI(r_scratch1, r_A, K);
|
|
else {
|
|
PPC_LI32(r_scratch1, K);
|
|
PPC_AND_DOT(r_scratch1, r_A,
|
|
r_scratch1);
|
|
}
|
|
break;
|
|
}
|
|
/* Sometimes branches are constructed "backward", with
|
|
* the false path being the branch and true path being
|
|
* a fallthrough to the next instruction.
|
|
*/
|
|
if (filter[i].jt == 0)
|
|
/* Swap the sense of the branch */
|
|
PPC_BCC(true_cond ^ COND_CMP_TRUE,
|
|
addrs[i + 1 + filter[i].jf]);
|
|
else {
|
|
PPC_BCC(true_cond, addrs[i + 1 + filter[i].jt]);
|
|
if (filter[i].jf != 0)
|
|
PPC_JMP(addrs[i + 1 + filter[i].jf]);
|
|
}
|
|
break;
|
|
default:
|
|
/* The filter contains something cruel & unusual.
|
|
* We don't handle it, but also there shouldn't be
|
|
* anything missing from our list.
|
|
*/
|
|
if (printk_ratelimit())
|
|
pr_err("BPF filter opcode %04x (@%d) unsupported\n",
|
|
filter[i].code, i);
|
|
return -ENOTSUPP;
|
|
}
|
|
|
|
}
|
|
/* Set end-of-body-code address for exit. */
|
|
addrs[i] = ctx->idx * 4;
|
|
|
|
return 0;
|
|
}
|
|
|
|
void bpf_jit_compile(struct sk_filter *fp)
|
|
{
|
|
unsigned int proglen;
|
|
unsigned int alloclen;
|
|
u32 *image = NULL;
|
|
u32 *code_base;
|
|
unsigned int *addrs;
|
|
struct codegen_context cgctx;
|
|
int pass;
|
|
int flen = fp->len;
|
|
|
|
if (!bpf_jit_enable)
|
|
return;
|
|
|
|
addrs = kzalloc((flen+1) * sizeof(*addrs), GFP_KERNEL);
|
|
if (addrs == NULL)
|
|
return;
|
|
|
|
/*
|
|
* There are multiple assembly passes as the generated code will change
|
|
* size as it settles down, figuring out the max branch offsets/exit
|
|
* paths required.
|
|
*
|
|
* The range of standard conditional branches is +/- 32Kbytes. Since
|
|
* BPF_MAXINSNS = 4096, we can only jump from (worst case) start to
|
|
* finish with 8 bytes/instruction. Not feasible, so long jumps are
|
|
* used, distinct from short branches.
|
|
*
|
|
* Current:
|
|
*
|
|
* For now, both branch types assemble to 2 words (short branches padded
|
|
* with a NOP); this is less efficient, but assembly will always complete
|
|
* after exactly 3 passes:
|
|
*
|
|
* First pass: No code buffer; Program is "faux-generated" -- no code
|
|
* emitted but maximum size of output determined (and addrs[] filled
|
|
* in). Also, we note whether we use M[], whether we use skb data, etc.
|
|
* All generation choices assumed to be 'worst-case', e.g. branches all
|
|
* far (2 instructions), return path code reduction not available, etc.
|
|
*
|
|
* Second pass: Code buffer allocated with size determined previously.
|
|
* Prologue generated to support features we have seen used. Exit paths
|
|
* determined and addrs[] is filled in again, as code may be slightly
|
|
* smaller as a result.
|
|
*
|
|
* Third pass: Code generated 'for real', and branch destinations
|
|
* determined from now-accurate addrs[] map.
|
|
*
|
|
* Ideal:
|
|
*
|
|
* If we optimise this, near branches will be shorter. On the
|
|
* first assembly pass, we should err on the side of caution and
|
|
* generate the biggest code. On subsequent passes, branches will be
|
|
* generated short or long and code size will reduce. With smaller
|
|
* code, more branches may fall into the short category, and code will
|
|
* reduce more.
|
|
*
|
|
* Finally, if we see one pass generate code the same size as the
|
|
* previous pass we have converged and should now generate code for
|
|
* real. Allocating at the end will also save the memory that would
|
|
* otherwise be wasted by the (small) current code shrinkage.
|
|
* Preferably, we should do a small number of passes (e.g. 5) and if we
|
|
* haven't converged by then, get impatient and force code to generate
|
|
* as-is, even if the odd branch would be left long. The chances of a
|
|
* long jump are tiny with all but the most enormous of BPF filter
|
|
* inputs, so we should usually converge on the third pass.
|
|
*/
|
|
|
|
cgctx.idx = 0;
|
|
cgctx.seen = 0;
|
|
cgctx.pc_ret0 = -1;
|
|
/* Scouting faux-generate pass 0 */
|
|
if (bpf_jit_build_body(fp, 0, &cgctx, addrs))
|
|
/* We hit something illegal or unsupported. */
|
|
goto out;
|
|
|
|
/*
|
|
* Pretend to build prologue, given the features we've seen. This will
|
|
* update ctgtx.idx as it pretends to output instructions, then we can
|
|
* calculate total size from idx.
|
|
*/
|
|
bpf_jit_build_prologue(fp, 0, &cgctx);
|
|
bpf_jit_build_epilogue(0, &cgctx);
|
|
|
|
proglen = cgctx.idx * 4;
|
|
alloclen = proglen + FUNCTION_DESCR_SIZE;
|
|
image = module_alloc(alloclen);
|
|
if (!image)
|
|
goto out;
|
|
|
|
code_base = image + (FUNCTION_DESCR_SIZE/4);
|
|
|
|
/* Code generation passes 1-2 */
|
|
for (pass = 1; pass < 3; pass++) {
|
|
/* Now build the prologue, body code & epilogue for real. */
|
|
cgctx.idx = 0;
|
|
bpf_jit_build_prologue(fp, code_base, &cgctx);
|
|
bpf_jit_build_body(fp, code_base, &cgctx, addrs);
|
|
bpf_jit_build_epilogue(code_base, &cgctx);
|
|
|
|
if (bpf_jit_enable > 1)
|
|
pr_info("Pass %d: shrink = %d, seen = 0x%x\n", pass,
|
|
proglen - (cgctx.idx * 4), cgctx.seen);
|
|
}
|
|
|
|
if (bpf_jit_enable > 1)
|
|
/* Note that we output the base address of the code_base
|
|
* rather than image, since opcodes are in code_base.
|
|
*/
|
|
bpf_jit_dump(flen, proglen, pass, code_base);
|
|
|
|
if (image) {
|
|
bpf_flush_icache(code_base, code_base + (proglen/4));
|
|
/* Function descriptor nastiness: Address + TOC */
|
|
((u64 *)image)[0] = (u64)code_base;
|
|
((u64 *)image)[1] = local_paca->kernel_toc;
|
|
fp->bpf_func = (void *)image;
|
|
}
|
|
out:
|
|
kfree(addrs);
|
|
return;
|
|
}
|
|
|
|
void bpf_jit_free(struct sk_filter *fp)
|
|
{
|
|
if (fp->bpf_func != sk_run_filter)
|
|
module_free(NULL, fp->bpf_func);
|
|
kfree(fp);
|
|
}
|