8a73cd4cfa
Adds support for High Speed I2C driver found in Exynos5 and later SoCs from Samsung. Driver only supports Device Tree method. Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com> Signed-off-by: Taekgyun Ko <taeggyun.ko@samsung.com> Reviewed-by: Simon Glass <sjg@google.com> Signed-off-by: Yuvaraj Kumar C D <yuvaraj.cd@samsung.com> Signed-off-by: Andrew Bresticker <abrestic@google.com> [wsa: rebased to v3.12-rc4 (no of_i2c.h anymore)] Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
45 lines
1.2 KiB
Plaintext
45 lines
1.2 KiB
Plaintext
* Samsung's High Speed I2C controller
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The Samsung's High Speed I2C controller is used to interface with I2C devices
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at various speeds ranging from 100khz to 3.4Mhz.
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Required properties:
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- compatible: value should be.
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-> "samsung,exynos5-hsi2c", for i2c compatible with exynos5 hsi2c.
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- reg: physical base address of the controller and length of memory mapped
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region.
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- interrupts: interrupt number to the cpu.
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- #address-cells: always 1 (for i2c addresses)
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- #size-cells: always 0
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- Pinctrl:
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- pinctrl-0: Pin control group to be used for this controller.
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- pinctrl-names: Should contain only one value - "default".
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Optional properties:
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- clock-frequency: Desired operating frequency in Hz of the bus.
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-> If not specified, the bus operates in fast-speed mode at
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at 100khz.
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-> If specified, the bus operates in high-speed mode only if the
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clock-frequency is >= 1Mhz.
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Example:
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hsi2c@12ca0000 {
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compatible = "samsung,exynos5-hsi2c";
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reg = <0x12ca0000 0x100>;
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interrupts = <56>;
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clock-frequency = <100000>;
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pinctrl-0 = <&i2c4_bus>;
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pinctrl-names = "default";
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#address-cells = <1>;
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#size-cells = <0>;
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s2mps11_pmic@66 {
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compatible = "samsung,s2mps11-pmic";
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reg = <0x66>;
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};
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};
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