forked from Minki/linux
d60a540ac5
Pull s390 updates from Heiko Carstens:
"Since Martin is on vacation you get the s390 pull request for the
v4.15 merge window this time from me.
Besides a lot of cleanups and bug fixes these are the most important
changes:
- a new regset for runtime instrumentation registers
- hardware accelerated AES-GCM support for the aes_s390 module
- support for the new CEX6S crypto cards
- support for FORTIFY_SOURCE
- addition of missing z13 and new z14 instructions to the in-kernel
disassembler
- generate opcode tables for the in-kernel disassembler out of a
simple text file instead of having to manually maintain those
tables
- fast memset16, memset32 and memset64 implementations
- removal of named saved segment support
- hardware counter support for z14
- queued spinlocks and queued rwlocks implementations for s390
- use the stack_depth tracking feature for s390 BPF JIT
- a new s390_sthyi system call which emulates the sthyi (store
hypervisor information) instruction
- removal of the old KVM virtio transport
- an s390 specific CPU alternatives implementation which is used in
the new spinlock code"
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux: (88 commits)
MAINTAINERS: add virtio-ccw.h to virtio/s390 section
s390/noexec: execute kexec datamover without DAT
s390: fix transactional execution control register handling
s390/bpf: take advantage of stack_depth tracking
s390: simplify transactional execution elf hwcap handling
s390/zcrypt: Rework struct ap_qact_ap_info.
s390/virtio: remove unused header file kvm_virtio.h
s390: avoid undefined behaviour
s390/disassembler: generate opcode tables from text file
s390/disassembler: remove insn_to_mnemonic()
s390/dasd: avoid calling do_gettimeofday()
s390: vfio-ccw: Do not attempt to free no-op, test and tic cda.
s390: remove named saved segment support
s390/archrandom: Reconsider s390 arch random implementation
s390/pci: do not require AIS facility
s390/qdio: sanitize put_indicator
s390/qdio: use atomic_cmpxchg
s390/nmi: avoid using long-displacement facility
s390: pass endianness info to sparse
s390/decompressor: remove informational messages
...
144 lines
4.0 KiB
C
144 lines
4.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Low level function for atomic operations
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*
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* Copyright IBM Corp. 1999, 2016
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*/
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#ifndef __ARCH_S390_ATOMIC_OPS__
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#define __ARCH_S390_ATOMIC_OPS__
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#ifdef CONFIG_HAVE_MARCH_Z196_FEATURES
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#define __ATOMIC_OP(op_name, op_type, op_string, op_barrier) \
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static inline op_type op_name(op_type val, op_type *ptr) \
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{ \
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op_type old; \
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\
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asm volatile( \
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op_string " %[old],%[val],%[ptr]\n" \
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op_barrier \
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: [old] "=d" (old), [ptr] "+Q" (*ptr) \
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: [val] "d" (val) : "cc", "memory"); \
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return old; \
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} \
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#define __ATOMIC_OPS(op_name, op_type, op_string) \
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__ATOMIC_OP(op_name, op_type, op_string, "\n") \
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__ATOMIC_OP(op_name##_barrier, op_type, op_string, "bcr 14,0\n")
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__ATOMIC_OPS(__atomic_add, int, "laa")
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__ATOMIC_OPS(__atomic_and, int, "lan")
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__ATOMIC_OPS(__atomic_or, int, "lao")
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__ATOMIC_OPS(__atomic_xor, int, "lax")
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__ATOMIC_OPS(__atomic64_add, long, "laag")
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__ATOMIC_OPS(__atomic64_and, long, "lang")
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__ATOMIC_OPS(__atomic64_or, long, "laog")
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__ATOMIC_OPS(__atomic64_xor, long, "laxg")
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#undef __ATOMIC_OPS
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#undef __ATOMIC_OP
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#define __ATOMIC_CONST_OP(op_name, op_type, op_string, op_barrier) \
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static inline void op_name(op_type val, op_type *ptr) \
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{ \
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asm volatile( \
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op_string " %[ptr],%[val]\n" \
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op_barrier \
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: [ptr] "+Q" (*ptr) : [val] "i" (val) : "cc", "memory");\
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}
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#define __ATOMIC_CONST_OPS(op_name, op_type, op_string) \
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__ATOMIC_CONST_OP(op_name, op_type, op_string, "\n") \
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__ATOMIC_CONST_OP(op_name##_barrier, op_type, op_string, "bcr 14,0\n")
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__ATOMIC_CONST_OPS(__atomic_add_const, int, "asi")
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__ATOMIC_CONST_OPS(__atomic64_add_const, long, "agsi")
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#undef __ATOMIC_CONST_OPS
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#undef __ATOMIC_CONST_OP
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#else /* CONFIG_HAVE_MARCH_Z196_FEATURES */
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#define __ATOMIC_OP(op_name, op_string) \
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static inline int op_name(int val, int *ptr) \
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{ \
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int old, new; \
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\
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asm volatile( \
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"0: lr %[new],%[old]\n" \
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op_string " %[new],%[val]\n" \
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" cs %[old],%[new],%[ptr]\n" \
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" jl 0b" \
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: [old] "=d" (old), [new] "=&d" (new), [ptr] "+Q" (*ptr)\
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: [val] "d" (val), "0" (*ptr) : "cc", "memory"); \
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return old; \
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}
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#define __ATOMIC_OPS(op_name, op_string) \
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__ATOMIC_OP(op_name, op_string) \
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__ATOMIC_OP(op_name##_barrier, op_string)
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__ATOMIC_OPS(__atomic_add, "ar")
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__ATOMIC_OPS(__atomic_and, "nr")
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__ATOMIC_OPS(__atomic_or, "or")
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__ATOMIC_OPS(__atomic_xor, "xr")
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#undef __ATOMIC_OPS
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#define __ATOMIC64_OP(op_name, op_string) \
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static inline long op_name(long val, long *ptr) \
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{ \
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long old, new; \
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\
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asm volatile( \
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"0: lgr %[new],%[old]\n" \
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op_string " %[new],%[val]\n" \
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" csg %[old],%[new],%[ptr]\n" \
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" jl 0b" \
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: [old] "=d" (old), [new] "=&d" (new), [ptr] "+Q" (*ptr)\
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: [val] "d" (val), "0" (*ptr) : "cc", "memory"); \
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return old; \
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}
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#define __ATOMIC64_OPS(op_name, op_string) \
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__ATOMIC64_OP(op_name, op_string) \
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__ATOMIC64_OP(op_name##_barrier, op_string)
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__ATOMIC64_OPS(__atomic64_add, "agr")
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__ATOMIC64_OPS(__atomic64_and, "ngr")
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__ATOMIC64_OPS(__atomic64_or, "ogr")
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__ATOMIC64_OPS(__atomic64_xor, "xgr")
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#undef __ATOMIC64_OPS
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#define __atomic_add_const(val, ptr) __atomic_add(val, ptr)
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#define __atomic_add_const_barrier(val, ptr) __atomic_add(val, ptr)
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#define __atomic64_add_const(val, ptr) __atomic64_add(val, ptr)
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#define __atomic64_add_const_barrier(val, ptr) __atomic64_add(val, ptr)
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#endif /* CONFIG_HAVE_MARCH_Z196_FEATURES */
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static inline int __atomic_cmpxchg(int *ptr, int old, int new)
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{
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return __sync_val_compare_and_swap(ptr, old, new);
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}
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static inline int __atomic_cmpxchg_bool(int *ptr, int old, int new)
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{
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return __sync_bool_compare_and_swap(ptr, old, new);
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}
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static inline long __atomic64_cmpxchg(long *ptr, long old, long new)
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{
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return __sync_val_compare_and_swap(ptr, old, new);
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}
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static inline long __atomic64_cmpxchg_bool(long *ptr, long old, long new)
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{
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return __sync_bool_compare_and_swap(ptr, old, new);
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}
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#endif /* __ARCH_S390_ATOMIC_OPS__ */
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