forked from Minki/linux
4be2ba93cf
Because hp300_read_clk() never checks the timer interrupt flag it may fail to notice that the timer has wrapped, allowing the clock to jump backwards. This is not a new problem. This is resolved by checking the interrupt flag and, if need be, taking wrap-around into account. The interrupt handler clears the flag when it eventually executes. Signed-off-by: Finn Thain <fthain@telegraphics.com.au> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
116 lines
2.7 KiB
C
116 lines
2.7 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* linux/arch/m68k/hp300/time.c
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*
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* Copyright (C) 1998 Philip Blundell <philb@gnu.org>
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*
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* This file contains the HP300-specific time handling code.
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*/
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#include <asm/ptrace.h>
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#include <linux/clocksource.h>
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/sched.h>
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#include <linux/kernel_stat.h>
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#include <linux/interrupt.h>
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#include <asm/machdep.h>
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#include <asm/irq.h>
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#include <asm/io.h>
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#include <asm/traps.h>
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#include <asm/blinken.h>
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static u64 hp300_read_clk(struct clocksource *cs);
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static struct clocksource hp300_clk = {
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.name = "timer",
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.rating = 250,
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.read = hp300_read_clk,
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.mask = CLOCKSOURCE_MASK(32),
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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};
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static u32 clk_total, clk_offset;
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/* Clock hardware definitions */
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#define CLOCKBASE 0xf05f8000
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#define CLKCR1 0x1
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#define CLKCR2 0x3
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#define CLKCR3 CLKCR1
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#define CLKSR CLKCR2
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#define CLKMSB1 0x5
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#define CLKLSB1 0x7
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#define CLKMSB2 0x9
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#define CLKMSB3 0xD
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#define CLKSR_INT1 BIT(0)
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/* This is for machines which generate the exact clock. */
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#define HP300_TIMER_CLOCK_FREQ 250000
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#define HP300_TIMER_CYCLES (HP300_TIMER_CLOCK_FREQ / HZ)
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#define INTVAL (HP300_TIMER_CYCLES - 1)
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static irqreturn_t hp300_tick(int irq, void *dev_id)
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{
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irq_handler_t timer_routine = dev_id;
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unsigned long flags;
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unsigned long tmp;
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local_irq_save(flags);
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in_8(CLOCKBASE + CLKSR);
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asm volatile ("movpw %1@(5),%0" : "=d" (tmp) : "a" (CLOCKBASE));
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clk_total += INTVAL;
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clk_offset = 0;
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timer_routine(0, NULL);
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local_irq_restore(flags);
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/* Turn off the network and SCSI leds */
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blinken_leds(0, 0xe0);
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return IRQ_HANDLED;
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}
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static u64 hp300_read_clk(struct clocksource *cs)
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{
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unsigned long flags;
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unsigned char lsb, msb, msb_new;
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u32 ticks;
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local_irq_save(flags);
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/* Read current timer 1 value */
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msb = in_8(CLOCKBASE + CLKMSB1);
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again:
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if ((in_8(CLOCKBASE + CLKSR) & CLKSR_INT1) && msb > 0)
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clk_offset = INTVAL;
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lsb = in_8(CLOCKBASE + CLKLSB1);
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msb_new = in_8(CLOCKBASE + CLKMSB1);
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if (msb_new != msb) {
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msb = msb_new;
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goto again;
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}
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ticks = INTVAL - ((msb << 8) | lsb);
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ticks += clk_offset + clk_total;
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local_irq_restore(flags);
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return ticks;
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}
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void __init hp300_sched_init(irq_handler_t vector)
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{
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out_8(CLOCKBASE + CLKCR2, 0x1); /* select CR1 */
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out_8(CLOCKBASE + CLKCR1, 0x1); /* reset */
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asm volatile(" movpw %0,%1@(5)" : : "d" (INTVAL), "a" (CLOCKBASE));
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if (request_irq(IRQ_AUTO_6, hp300_tick, IRQF_TIMER, "timer tick", vector))
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pr_err("Couldn't register timer interrupt\n");
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out_8(CLOCKBASE + CLKCR2, 0x1); /* select CR1 */
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out_8(CLOCKBASE + CLKCR1, 0x40); /* enable irq */
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clocksource_register_hz(&hp300_clk, HP300_TIMER_CLOCK_FREQ);
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}
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