forked from Minki/linux
9920322ccd
After successful loading of firmware, a CARD READY indication is received by host. Common device configuration parameters are sent to the device after this. It includes information like device operating mode (Wi-Fi alone or BT coex), power save related parameters, GPIO information etc. As device supports BT coex, this frame is send in COEX queue initially. Based on the operating mode, CARD READY indication is received from each protocol module in firmware i.e. WLAN, BT. Signed-off-by: Prameela Rani Garnepudi <prameela.j04cs@gmail.com> Signed-off-by: Amitkumar Karwar <amit.karwar@redpinesignals.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
279 lines
6.9 KiB
C
279 lines
6.9 KiB
C
/**
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* Copyright (c) 2014 Redpine Signals Inc.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef __RSI_MAIN_H__
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#define __RSI_MAIN_H__
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#include <linux/string.h>
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#include <linux/skbuff.h>
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#include <net/mac80211.h>
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#define ERR_ZONE BIT(0) /* For Error Msgs */
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#define INFO_ZONE BIT(1) /* For General Status Msgs */
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#define INIT_ZONE BIT(2) /* For Driver Init Seq Msgs */
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#define MGMT_TX_ZONE BIT(3) /* For TX Mgmt Path Msgs */
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#define MGMT_RX_ZONE BIT(4) /* For RX Mgmt Path Msgs */
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#define DATA_TX_ZONE BIT(5) /* For TX Data Path Msgs */
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#define DATA_RX_ZONE BIT(6) /* For RX Data Path Msgs */
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#define FSM_ZONE BIT(7) /* For State Machine Msgs */
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#define ISR_ZONE BIT(8) /* For Interrupt Msgs */
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enum RSI_FSM_STATES {
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FSM_FW_NOT_LOADED,
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FSM_CARD_NOT_READY,
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FSM_COMMON_DEV_PARAMS_SENT,
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FSM_BOOT_PARAMS_SENT,
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FSM_EEPROM_READ_MAC_ADDR,
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FSM_RESET_MAC_SENT,
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FSM_RADIO_CAPS_SENT,
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FSM_BB_RF_PROG_SENT,
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FSM_MAC_INIT_DONE
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};
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extern u32 rsi_zone_enabled;
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extern __printf(2, 3) void rsi_dbg(u32 zone, const char *fmt, ...);
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#define RSI_MAX_VIFS 1
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#define NUM_EDCA_QUEUES 4
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#define IEEE80211_ADDR_LEN 6
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#define FRAME_DESC_SZ 16
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#define MIN_802_11_HDR_LEN 24
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#define DATA_QUEUE_WATER_MARK 400
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#define MIN_DATA_QUEUE_WATER_MARK 300
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#define MULTICAST_WATER_MARK 200
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#define MAC_80211_HDR_FRAME_CONTROL 0
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#define WME_NUM_AC 4
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#define NUM_SOFT_QUEUES 5
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#define MAX_HW_QUEUES 8
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#define INVALID_QUEUE 0xff
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#define MAX_CONTINUOUS_VO_PKTS 8
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#define MAX_CONTINUOUS_VI_PKTS 4
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/* Queue information */
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#define RSI_COEX_Q 0x0
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#define RSI_WIFI_MGMT_Q 0x4
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#define RSI_WIFI_DATA_Q 0x5
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#define IEEE80211_MGMT_FRAME 0x00
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#define IEEE80211_CTL_FRAME 0x04
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#define IEEE80211_QOS_TID 0x0f
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#define IEEE80211_NONQOS_TID 16
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#define MAX_DEBUGFS_ENTRIES 4
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#define TID_TO_WME_AC(_tid) ( \
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((_tid) == 0 || (_tid) == 3) ? BE_Q : \
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((_tid) < 3) ? BK_Q : \
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((_tid) < 6) ? VI_Q : \
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VO_Q)
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#define WME_AC(_q) ( \
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((_q) == BK_Q) ? IEEE80211_AC_BK : \
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((_q) == BE_Q) ? IEEE80211_AC_BE : \
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((_q) == VI_Q) ? IEEE80211_AC_VI : \
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IEEE80211_AC_VO)
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#define RSI_DEV_9113 1
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struct version_info {
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u16 major;
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u16 minor;
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u16 release_num;
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u16 patch_num;
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} __packed;
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struct skb_info {
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s8 rssi;
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u32 flags;
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u16 channel;
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s8 tid;
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s8 sta_id;
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};
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enum edca_queue {
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BK_Q,
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BE_Q,
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VI_Q,
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VO_Q,
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MGMT_SOFT_Q
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};
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struct security_info {
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bool security_enable;
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u32 ptk_cipher;
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u32 gtk_cipher;
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};
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struct wmm_qinfo {
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s32 weight;
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s32 wme_params;
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s32 pkt_contended;
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s32 txop;
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};
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struct transmit_q_stats {
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u32 total_tx_pkt_send[NUM_EDCA_QUEUES + 1];
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u32 total_tx_pkt_freed[NUM_EDCA_QUEUES + 1];
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};
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struct vif_priv {
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bool is_ht;
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bool sgi;
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u16 seq_start;
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};
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struct rsi_event {
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atomic_t event_condition;
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wait_queue_head_t event_queue;
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};
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struct rsi_thread {
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void (*thread_function)(void *);
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struct completion completion;
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struct task_struct *task;
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struct rsi_event event;
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atomic_t thread_done;
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};
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struct cqm_info {
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s8 last_cqm_event_rssi;
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int rssi_thold;
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u32 rssi_hyst;
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};
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struct rsi_hw;
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struct rsi_common {
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struct rsi_hw *priv;
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struct vif_priv vif_info[RSI_MAX_VIFS];
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bool mgmt_q_block;
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struct version_info driver_ver;
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struct version_info fw_ver;
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struct rsi_thread tx_thread;
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struct sk_buff_head tx_queue[NUM_EDCA_QUEUES + 1];
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/* Mutex declaration */
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struct mutex mutex;
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/* Mutex used between tx/rx threads */
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struct mutex tx_rxlock;
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u8 endpoint;
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/* Channel/band related */
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u8 band;
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u8 channel_width;
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u16 rts_threshold;
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u16 bitrate_mask[2];
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u32 fixedrate_mask[2];
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u8 rf_reset;
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struct transmit_q_stats tx_stats;
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struct security_info secinfo;
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struct wmm_qinfo tx_qinfo[NUM_EDCA_QUEUES];
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struct ieee80211_tx_queue_params edca_params[NUM_EDCA_QUEUES];
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u8 mac_addr[IEEE80211_ADDR_LEN];
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/* state related */
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u32 fsm_state;
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bool init_done;
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u8 bb_rf_prog_count;
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bool iface_down;
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/* Generic */
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u8 channel;
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u8 *rx_data_pkt;
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u8 mac_id;
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u8 radio_id;
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u16 rate_pwr[20];
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u16 min_rate;
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/* WMM algo related */
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u8 selected_qnum;
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u32 pkt_cnt;
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u8 min_weight;
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/* bgscan related */
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struct cqm_info cqm_info;
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bool hw_data_qs_blocked;
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u8 driver_mode;
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u8 coex_mode;
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u16 oper_mode;
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u8 lp_ps_handshake_mode;
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u8 ulp_ps_handshake_mode;
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u8 rf_power_val;
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u8 wlan_rf_power_mode;
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u8 obm_ant_sel_val;
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int tx_power;
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u8 ant_in_use;
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};
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enum host_intf {
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RSI_HOST_INTF_SDIO = 0,
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RSI_HOST_INTF_USB
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};
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struct rsi_hw {
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struct rsi_common *priv;
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u8 device_model;
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struct ieee80211_hw *hw;
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struct ieee80211_vif *vifs[RSI_MAX_VIFS];
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struct ieee80211_tx_queue_params edca_params[NUM_EDCA_QUEUES];
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struct ieee80211_supported_band sbands[NUM_NL80211_BANDS];
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struct device *device;
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u8 sc_nvifs;
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enum host_intf rsi_host_intf;
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u16 block_size;
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u32 usb_buffer_status_reg;
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#ifdef CONFIG_RSI_DEBUGFS
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struct rsi_debugfs *dfsentry;
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u8 num_debugfs_entries;
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#endif
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char *fw_file_name;
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struct timer_list bl_cmd_timer;
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bool blcmd_timer_expired;
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u32 flash_capacity;
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u8 dfs_region;
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void *rsi_dev;
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struct rsi_host_intf_ops *host_intf_ops;
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int (*check_hw_queue_status)(struct rsi_hw *adapter, u8 q_num);
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int (*rx_urb_submit)(struct rsi_hw *adapter);
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int (*determine_event_timeout)(struct rsi_hw *adapter);
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};
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struct rsi_host_intf_ops {
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int (*read_pkt)(struct rsi_hw *adapter, u8 *pkt, u32 len);
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int (*write_pkt)(struct rsi_hw *adapter, u8 *pkt, u32 len);
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int (*master_access_msword)(struct rsi_hw *adapter, u16 ms_word);
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int (*read_reg_multiple)(struct rsi_hw *adapter, u32 addr,
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u8 *data, u16 count);
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int (*write_reg_multiple)(struct rsi_hw *adapter, u32 addr,
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u8 *data, u16 count);
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int (*master_reg_read)(struct rsi_hw *adapter, u32 addr,
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u32 *read_buf, u16 size);
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int (*master_reg_write)(struct rsi_hw *adapter,
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unsigned long addr, unsigned long data,
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u16 size);
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int (*load_data_master_write)(struct rsi_hw *adapter, u32 addr,
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u32 instructions_size, u16 block_size,
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u8 *fw);
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};
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#endif
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