4b7f48d395
The UniPhier System Bus is an external bus that connects on-board devices to the UniPhier SoC. Each bank (chip select) is dynamically mapped to the CPU-viewed address base via the bus controller. The bus controller must be configured before any access to the bus. This driver parses the "ranges" property of the System Bus node and initialized the bus controller. After the bus becomes ready, devices below it are populated. Note: Each bank can be mapped anywhere in the supported address space; there is nothing preventing us from assigning bank 0 on 0x42000000, 0x43000000, or anywhere as long as such region is not used by others. So, the "ranges" is just one possible software configuration, which does not seem to fit in device tree because device tree is a hardware description language. However, of_translate_address() requires "ranges" in every bus node between CPUs and device mapped on the CPU address space. In other words, "ranges" properties must be statically defined in device tree. After some discussion, I decided the dynamic address reassignment by the driver is too bothersome. Instead, the device tree should provide a reasonable translation setup that the OS can rely on. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Olof Johansson <olof@lixom.net>
152 lines
4.3 KiB
Plaintext
152 lines
4.3 KiB
Plaintext
#
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# Bus Devices
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#
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menu "Bus devices"
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config ARM_CCI
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bool
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config ARM_CCI_PMU
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bool
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select ARM_CCI
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config ARM_CCI400_COMMON
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bool
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select ARM_CCI
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config ARM_CCI400_PMU
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bool "ARM CCI400 PMU support"
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depends on (ARM && CPU_V7) || ARM64
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depends on PERF_EVENTS
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select ARM_CCI400_COMMON
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select ARM_CCI_PMU
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help
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Support for PMU events monitoring on the ARM CCI-400 (cache coherent
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interconnect). CCI-400 supports counting events related to the
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connected slave/master interfaces.
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config ARM_CCI400_PORT_CTRL
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bool
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depends on ARM && OF && CPU_V7
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select ARM_CCI400_COMMON
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help
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Low level power management driver for CCI400 cache coherent
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interconnect for ARM platforms.
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config ARM_CCI500_PMU
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bool "ARM CCI500 PMU support"
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depends on (ARM && CPU_V7) || ARM64
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depends on PERF_EVENTS
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select ARM_CCI_PMU
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help
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Support for PMU events monitoring on the ARM CCI-500 cache coherent
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interconnect. CCI-500 provides 8 independent event counters, which
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can count events pertaining to the slave/master interfaces as well
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as the internal events to the CCI.
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If unsure, say Y
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config ARM_CCN
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bool "ARM CCN driver support"
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depends on ARM || ARM64
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depends on PERF_EVENTS
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help
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PMU (perf) driver supporting the ARM CCN (Cache Coherent Network)
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interconnect.
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config BRCMSTB_GISB_ARB
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bool "Broadcom STB GISB bus arbiter"
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depends on ARM || MIPS
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help
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Driver for the Broadcom Set Top Box System-on-a-chip internal bus
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arbiter. This driver provides timeout and target abort error handling
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and internal bus master decoding.
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config IMX_WEIM
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bool "Freescale EIM DRIVER"
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depends on ARCH_MXC
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help
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Driver for i.MX WEIM controller.
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The WEIM(Wireless External Interface Module) works like a bus.
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You can attach many different devices on it, such as NOR, onenand.
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config MIPS_CDMM
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bool "MIPS Common Device Memory Map (CDMM) Driver"
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depends on CPU_MIPSR2
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help
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Driver needed for the MIPS Common Device Memory Map bus in MIPS
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cores. This bus is for per-CPU tightly coupled devices such as the
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Fast Debug Channel (FDC).
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For this to work, either your bootloader needs to enable the CDMM
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region at an unused physical address on the boot CPU, or else your
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platform code needs to implement mips_cdmm_phys_base() (see
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asm/cdmm.h).
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config MVEBU_MBUS
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bool
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depends on PLAT_ORION
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help
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Driver needed for the MBus configuration on Marvell EBU SoCs
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(Kirkwood, Dove, Orion5x, MV78XX0 and Armada 370/XP).
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config OMAP_INTERCONNECT
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tristate "OMAP INTERCONNECT DRIVER"
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depends on ARCH_OMAP2PLUS
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help
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Driver to enable OMAP interconnect error handling driver.
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config OMAP_OCP2SCP
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tristate "OMAP OCP2SCP DRIVER"
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depends on ARCH_OMAP2PLUS
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help
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Driver to enable ocp2scp module which transforms ocp interface
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protocol to scp protocol. In OMAP4, USB PHY is connected via
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OCP2SCP and in OMAP5, both USB PHY and SATA PHY is connected via
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OCP2SCP.
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config SIMPLE_PM_BUS
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bool "Simple Power-Managed Bus Driver"
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depends on OF && PM
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depends on ARCH_SHMOBILE || COMPILE_TEST
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help
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Driver for transparent busses that don't need a real driver, but
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where the bus controller is part of a PM domain, or under the control
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of a functional clock, and thus relies on runtime PM for managing
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this PM domain and/or clock.
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An example of such a bus controller is the Renesas Bus State
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Controller (BSC, sometimes called "LBSC within Bus Bridge", or
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"External Bus Interface") as found on several Renesas ARM SoCs.
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config SUNXI_RSB
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tristate "Allwinner sunXi Reduced Serial Bus Driver"
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default MACH_SUN8I || MACH_SUN9I
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depends on ARCH_SUNXI
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select REGMAP
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help
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Say y here to enable support for Allwinner's Reduced Serial Bus
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(RSB) support. This controller is responsible for communicating
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with various RSB based devices, such as AXP223, AXP8XX PMICs,
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and AC100/AC200 ICs.
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config UNIPHIER_SYSTEM_BUS
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tristate "UniPhier System Bus driver"
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depends on ARCH_UNIPHIER && OF
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default y
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help
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Support for UniPhier System Bus, a simple external bus. This is
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needed to use on-board devices connected to UniPhier SoCs.
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config VEXPRESS_CONFIG
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bool "Versatile Express configuration bus"
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default y if ARCH_VEXPRESS
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depends on ARM || ARM64
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depends on OF
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select REGMAP
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help
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Platform configuration infrastructure for the ARM Ltd.
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Versatile Express.
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endmenu
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