9f80ccda53
When building for Thumb2, the .alt.smp.init sections that are emitted by the ALT_UP() patching code may not be 32-bit aligned, even though the fixup_smp_on_up() routine expects that. This results in alignment faults at module load time, which need to be fixed up by the fault handler. So let's align those sections explicitly, and prevent this from occurring. Cc: <stable@vger.kernel.org> Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
138 lines
3.1 KiB
C
138 lines
3.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* arch/arm/include/asm/processor.h
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*
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* Copyright (C) 1995-1999 Russell King
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*/
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#ifndef __ASM_ARM_PROCESSOR_H
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#define __ASM_ARM_PROCESSOR_H
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#ifdef __KERNEL__
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#include <asm/hw_breakpoint.h>
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#include <asm/ptrace.h>
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#include <asm/types.h>
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#include <asm/unified.h>
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#include <asm/vdso/processor.h>
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#ifdef __KERNEL__
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#define STACK_TOP ((current->personality & ADDR_LIMIT_32BIT) ? \
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TASK_SIZE : TASK_SIZE_26)
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#define STACK_TOP_MAX TASK_SIZE
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#endif
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struct debug_info {
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#ifdef CONFIG_HAVE_HW_BREAKPOINT
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struct perf_event *hbp[ARM_MAX_HBP_SLOTS];
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#endif
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};
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struct thread_struct {
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/* fault info */
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unsigned long address;
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unsigned long trap_no;
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unsigned long error_code;
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/* debugging */
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struct debug_info debug;
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};
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/*
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* Everything usercopied to/from thread_struct is statically-sized, so
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* no hardened usercopy whitelist is needed.
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*/
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static inline void arch_thread_struct_whitelist(unsigned long *offset,
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unsigned long *size)
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{
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*offset = *size = 0;
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}
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#define INIT_THREAD { }
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#define start_thread(regs,pc,sp) \
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({ \
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unsigned long r7, r8, r9; \
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\
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if (IS_ENABLED(CONFIG_BINFMT_ELF_FDPIC)) { \
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r7 = regs->ARM_r7; \
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r8 = regs->ARM_r8; \
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r9 = regs->ARM_r9; \
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} \
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memset(regs->uregs, 0, sizeof(regs->uregs)); \
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if (IS_ENABLED(CONFIG_BINFMT_ELF_FDPIC) && \
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current->personality & FDPIC_FUNCPTRS) { \
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regs->ARM_r7 = r7; \
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regs->ARM_r8 = r8; \
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regs->ARM_r9 = r9; \
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regs->ARM_r10 = current->mm->start_data; \
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} else if (!IS_ENABLED(CONFIG_MMU)) \
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regs->ARM_r10 = current->mm->start_data; \
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if (current->personality & ADDR_LIMIT_32BIT) \
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regs->ARM_cpsr = USR_MODE; \
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else \
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regs->ARM_cpsr = USR26_MODE; \
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if (elf_hwcap & HWCAP_THUMB && pc & 1) \
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regs->ARM_cpsr |= PSR_T_BIT; \
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regs->ARM_cpsr |= PSR_ENDSTATE; \
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regs->ARM_pc = pc & ~1; /* pc */ \
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regs->ARM_sp = sp; /* sp */ \
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})
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/* Forward declaration, a strange C thing */
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struct task_struct;
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/* Free all resources held by a thread. */
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extern void release_thread(struct task_struct *);
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unsigned long __get_wchan(struct task_struct *p);
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#define task_pt_regs(p) \
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((struct pt_regs *)(THREAD_START_SP + task_stack_page(p)) - 1)
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#define KSTK_EIP(tsk) task_pt_regs(tsk)->ARM_pc
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#define KSTK_ESP(tsk) task_pt_regs(tsk)->ARM_sp
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#ifdef CONFIG_SMP
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#define __ALT_SMP_ASM(smp, up) \
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"9998: " smp "\n" \
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" .pushsection \".alt.smp.init\", \"a\"\n" \
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" .align 2\n" \
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" .long 9998b - .\n" \
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" " up "\n" \
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" .popsection\n"
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#else
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#define __ALT_SMP_ASM(smp, up) up
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#endif
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/*
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* Prefetching support - only ARMv5.
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*/
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#if __LINUX_ARM_ARCH__ >= 5
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#define ARCH_HAS_PREFETCH
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static inline void prefetch(const void *ptr)
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{
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__asm__ __volatile__(
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"pld\t%a0"
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:: "p" (ptr));
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}
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#if __LINUX_ARM_ARCH__ >= 7 && defined(CONFIG_SMP)
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#define ARCH_HAS_PREFETCHW
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static inline void prefetchw(const void *ptr)
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{
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__asm__ __volatile__(
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".arch_extension mp\n"
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__ALT_SMP_ASM(
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"pldw\t%a0",
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"pld\t%a0"
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)
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:: "p" (ptr));
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}
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#endif
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#endif
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#endif
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#endif /* __ASM_ARM_PROCESSOR_H */
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