forked from Minki/linux
5615f69bc2
This patch initializes KASan shadow region's page table and memory. There are two stage for KASan initializing: 1. At early boot stage the whole shadow region is mapped to just one physical page (kasan_zero_page). It is finished by the function kasan_early_init which is called by __mmap_switched(arch/arm/kernel/ head-common.S) 2. After the calling of paging_init, we use kasan_zero_page as zero shadow for some memory that KASan does not need to track, and we allocate a new shadow space for the other memory that KASan need to track. These issues are finished by the function kasan_init which is call by setup_arch. When using KASan we also need to increase the THREAD_SIZE_ORDER from 1 to 2 as the extra calls for shadow memory uses quite a bit of stack. As we need to make a temporary copy of the PGD when setting up shadow memory we create a helpful PGD_SIZE definition for both LPAE and non-LPAE setups. The KASan core code unconditionally calls pud_populate() so this needs to be changed from BUG() to do {} while (0) when building with KASan enabled. After the initial development by Andre Ryabinin several modifications have been made to this code: Abbott Liu <liuwenliang@huawei.com> - Add support ARM LPAE: If LPAE is enabled, KASan shadow region's mapping table need be copied in the pgd_alloc() function. - Change kasan_pte_populate,kasan_pmd_populate,kasan_pud_populate, kasan_pgd_populate from .meminit.text section to .init.text section. Reported by Florian Fainelli <f.fainelli@gmail.com> Linus Walleij <linus.walleij@linaro.org>: - Drop the custom mainpulation of TTBR0 and just use cpu_switch_mm() to switch the pgd table. - Adopt to handle 4th level page tabel folding. - Rewrite the entire page directory and page entry initialization sequence to be recursive based on ARM64:s kasan_init.c. Ard Biesheuvel <ardb@kernel.org>: - Necessary underlying fixes. - Crucial bug fixes to the memory set-up code. Co-developed-by: Andrey Ryabinin <aryabinin@virtuozzo.com> Co-developed-by: Abbott Liu <liuwenliang@huawei.com> Co-developed-by: Ard Biesheuvel <ardb@kernel.org> Cc: Alexander Potapenko <glider@google.com> Cc: Dmitry Vyukov <dvyukov@google.com> Cc: kasan-dev@googlegroups.com Cc: Mike Rapoport <rppt@linux.ibm.com> Acked-by: Mike Rapoport <rppt@linux.ibm.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Tested-by: Ard Biesheuvel <ardb@kernel.org> # QEMU/KVM/mach-virt/LPAE/8G Tested-by: Florian Fainelli <f.fainelli@gmail.com> # Brahma SoCs Tested-by: Ahmad Fatoum <a.fatoum@pengutronix.de> # i.MX6Q Reported-by: Russell King - ARM Linux <rmk+kernel@armlinux.org.uk> Reported-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Andrey Ryabinin <aryabinin@virtuozzo.com> Signed-off-by: Abbott Liu <liuwenliang@huawei.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
212 lines
4.5 KiB
C
212 lines
4.5 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* linux/arch/arm/mm/pgd.c
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*
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* Copyright (C) 1998-2005 Russell King
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*/
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#include <linux/mm.h>
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#include <linux/gfp.h>
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#include <linux/highmem.h>
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#include <linux/slab.h>
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#include <asm/cp15.h>
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#include <asm/pgalloc.h>
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#include <asm/page.h>
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#include <asm/tlbflush.h>
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#include "mm.h"
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#ifdef CONFIG_ARM_LPAE
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#define __pgd_alloc() kmalloc_array(PTRS_PER_PGD, sizeof(pgd_t), GFP_KERNEL)
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#define __pgd_free(pgd) kfree(pgd)
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#else
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#define __pgd_alloc() (pgd_t *)__get_free_pages(GFP_KERNEL, 2)
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#define __pgd_free(pgd) free_pages((unsigned long)pgd, 2)
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#endif
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/*
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* need to get a 16k page for level 1
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*/
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pgd_t *pgd_alloc(struct mm_struct *mm)
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{
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pgd_t *new_pgd, *init_pgd;
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p4d_t *new_p4d, *init_p4d;
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pud_t *new_pud, *init_pud;
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pmd_t *new_pmd, *init_pmd;
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pte_t *new_pte, *init_pte;
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new_pgd = __pgd_alloc();
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if (!new_pgd)
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goto no_pgd;
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memset(new_pgd, 0, USER_PTRS_PER_PGD * sizeof(pgd_t));
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/*
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* Copy over the kernel and IO PGD entries
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*/
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init_pgd = pgd_offset_k(0);
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memcpy(new_pgd + USER_PTRS_PER_PGD, init_pgd + USER_PTRS_PER_PGD,
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(PTRS_PER_PGD - USER_PTRS_PER_PGD) * sizeof(pgd_t));
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clean_dcache_area(new_pgd, PTRS_PER_PGD * sizeof(pgd_t));
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#ifdef CONFIG_ARM_LPAE
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/*
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* Allocate PMD table for modules and pkmap mappings.
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*/
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new_p4d = p4d_alloc(mm, new_pgd + pgd_index(MODULES_VADDR),
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MODULES_VADDR);
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if (!new_p4d)
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goto no_p4d;
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new_pud = pud_alloc(mm, new_p4d, MODULES_VADDR);
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if (!new_pud)
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goto no_pud;
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new_pmd = pmd_alloc(mm, new_pud, 0);
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if (!new_pmd)
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goto no_pmd;
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#ifdef CONFIG_KASAN
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/*
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* Copy PMD table for KASAN shadow mappings.
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*/
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init_pgd = pgd_offset_k(TASK_SIZE);
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init_p4d = p4d_offset(init_pgd, TASK_SIZE);
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init_pud = pud_offset(init_p4d, TASK_SIZE);
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init_pmd = pmd_offset(init_pud, TASK_SIZE);
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new_pmd = pmd_offset(new_pud, TASK_SIZE);
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memcpy(new_pmd, init_pmd,
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(pmd_index(MODULES_VADDR) - pmd_index(TASK_SIZE))
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* sizeof(pmd_t));
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clean_dcache_area(new_pmd, PTRS_PER_PMD * sizeof(pmd_t));
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#endif /* CONFIG_KASAN */
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#endif /* CONFIG_LPAE */
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if (!vectors_high()) {
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/*
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* On ARM, first page must always be allocated since it
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* contains the machine vectors. The vectors are always high
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* with LPAE.
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*/
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new_p4d = p4d_alloc(mm, new_pgd, 0);
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if (!new_p4d)
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goto no_p4d;
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new_pud = pud_alloc(mm, new_p4d, 0);
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if (!new_pud)
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goto no_pud;
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new_pmd = pmd_alloc(mm, new_pud, 0);
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if (!new_pmd)
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goto no_pmd;
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new_pte = pte_alloc_map(mm, new_pmd, 0);
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if (!new_pte)
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goto no_pte;
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#ifndef CONFIG_ARM_LPAE
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/*
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* Modify the PTE pointer to have the correct domain. This
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* needs to be the vectors domain to avoid the low vectors
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* being unmapped.
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*/
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pmd_val(*new_pmd) &= ~PMD_DOMAIN_MASK;
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pmd_val(*new_pmd) |= PMD_DOMAIN(DOMAIN_VECTORS);
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#endif
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init_p4d = p4d_offset(init_pgd, 0);
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init_pud = pud_offset(init_p4d, 0);
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init_pmd = pmd_offset(init_pud, 0);
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init_pte = pte_offset_map(init_pmd, 0);
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set_pte_ext(new_pte + 0, init_pte[0], 0);
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set_pte_ext(new_pte + 1, init_pte[1], 0);
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pte_unmap(init_pte);
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pte_unmap(new_pte);
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}
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return new_pgd;
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no_pte:
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pmd_free(mm, new_pmd);
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mm_dec_nr_pmds(mm);
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no_pmd:
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pud_free(mm, new_pud);
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no_pud:
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p4d_free(mm, new_p4d);
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no_p4d:
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__pgd_free(new_pgd);
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no_pgd:
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return NULL;
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}
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void pgd_free(struct mm_struct *mm, pgd_t *pgd_base)
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{
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pgd_t *pgd;
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p4d_t *p4d;
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pud_t *pud;
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pmd_t *pmd;
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pgtable_t pte;
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if (!pgd_base)
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return;
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pgd = pgd_base + pgd_index(0);
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if (pgd_none_or_clear_bad(pgd))
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goto no_pgd;
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p4d = p4d_offset(pgd, 0);
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if (p4d_none_or_clear_bad(p4d))
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goto no_p4d;
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pud = pud_offset(p4d, 0);
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if (pud_none_or_clear_bad(pud))
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goto no_pud;
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pmd = pmd_offset(pud, 0);
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if (pmd_none_or_clear_bad(pmd))
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goto no_pmd;
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pte = pmd_pgtable(*pmd);
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pmd_clear(pmd);
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pte_free(mm, pte);
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mm_dec_nr_ptes(mm);
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no_pmd:
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pud_clear(pud);
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pmd_free(mm, pmd);
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mm_dec_nr_pmds(mm);
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no_pud:
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p4d_clear(p4d);
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pud_free(mm, pud);
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no_p4d:
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pgd_clear(pgd);
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p4d_free(mm, p4d);
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no_pgd:
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#ifdef CONFIG_ARM_LPAE
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/*
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* Free modules/pkmap or identity pmd tables.
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*/
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for (pgd = pgd_base; pgd < pgd_base + PTRS_PER_PGD; pgd++) {
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if (pgd_none_or_clear_bad(pgd))
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continue;
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if (pgd_val(*pgd) & L_PGD_SWAPPER)
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continue;
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p4d = p4d_offset(pgd, 0);
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if (p4d_none_or_clear_bad(p4d))
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continue;
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pud = pud_offset(p4d, 0);
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if (pud_none_or_clear_bad(pud))
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continue;
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pmd = pmd_offset(pud, 0);
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pud_clear(pud);
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pmd_free(mm, pmd);
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mm_dec_nr_pmds(mm);
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p4d_clear(p4d);
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pud_free(mm, pud);
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mm_dec_nr_puds(mm);
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pgd_clear(pgd);
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p4d_free(mm, p4d);
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}
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#endif
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__pgd_free(pgd_base);
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}
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